LEADER 12217nam 2200493 450 001 9910820644803321 005 20240112051737.0 010 $a9781630819330$b(electronic bk.) 010 $z9781630819323 035 $a(MiAaPQ)EBC30339942 035 $a(Au-PeEL)EBL30339942 035 $a(CKB)26027387600041 035 $a(BIP)085615770 035 $a(EXLCZ)9926027387600041 100 $a20240112d2023 uy 0 101 0 $aeng 135 $aurcnu|||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aLumped Elements for RF and Microwave Circuits /$fInder J. Bahl 205 $aSecond edition. 210 1$aNorwood, MA :$cArtech House,$d[2023] 210 4$dİ2023 215 $a1 online resource (593 pages) 311 08$aPrint version: Bahl, Inder J. Lumped Elements for RF and Microwave Circuits, Second Edition Norwood : Artech House,c2022 9781630819323 320 $aIncludes bibliographical references and index. 327 $aLumped Elements for RF and Microwave Circuits Second Edition -- Contents -- Preface -- Chapter 1 Introduction -- 1.1 History of Lumped Elements -- 1.2 Why Use Lumped Elements for RF and Microwave Circuits? -- 1.3 L, C, R Circuit Elements -- 1.4 Basic Design of Lumped Elements -- 1.4.1 Capacitor -- 1.4.2 Inductor -- 1.4.3 Resistor -- 1.5 Lumped-Element Modeling -- 1.6 Fabrication -- 1.7 Applications -- References -- Chapter 2 Inductors -- 2.1 Introduction -- 2.2 Basic Definitions -- 2.2.1 Inductance -- 2.2.2 Magnetic Energy -- 2.2.3 Mutual Inductance -- 2.2.4 Effective Inductance -- 2.2.5 Impedance -- 2.2.6 Time Constant -- 2.2.7 Quality Factor -- 2.2.8 Self-Resonant Frequency -- 2.2.9 Maximum Current Rating -- 2.2.10 Maximum Power Rating -- 2.2.11 Other Parameters -- 2.3 Inductor Configurations -- 2.4 Inductor Models -- 2.4.1 Analytical Models -- 2.4.2 Coupled-Line Approach -- 2.4.3 Mutual Inductance Approach -- 2.4.4 Numerical Approach -- 2.4.5 Measurement-Based Model -- 2.5 Coupling Between Inductors -- 2.5.1 Low-Resistivity Substrates -- 2.5.2 High-Resistivity Substrates -- 2.6 Electrical Representations -- 2.6.1 Series and Parallel Representations -- 2.6.2 Network Representations -- References -- Chapter 3 Printed Inductors -- 3.1 Inductors on Si Substrate -- 3.1.1 Conductor Loss -- 3.1.2 Substrate Loss -- 3.1.3 Layout Considerations -- 3.1.4 Inductor Model -- 3.1.5 Q-Enhancement Techniques -- 3.1.6 Stacked-Coil Inductor -- 3.1.7 Temperature Dependence -- 3.2 Inductors on GaAs Substrate -- 3.2.1 Inductor Models -- 3.2.2 Figure of Merit -- 3.2.3 Comprehensive Inductor Data -- 3.2.4 Q-Enhancement Techniques -- 3.2.5 Compact Inductors -- 3.2.6 High Current Handling Capability Inductors -- 3.3 Printed Circuit Board Inductors -- 3.4 Hybrid Integrated Circuit Inductors -- 3.4.1 Thin-Film Inductors -- 3.4.2 Thick-Film Inductors. 327 $a3.4.3 LTCC Inductors -- 3.5 Ferromagnetic Inductors -- References -- Chapter 4 Wire Inductors -- 4.1 Wire-Wound Inductors -- 4.1.1 Analytical Expressions -- 4.1.2 Compact High-Frequency Inductors -- 4.2 Bond Wire Inductor -- 4.2.1 Single and Multiple Wires -- 4.2.2 Wire Near a Corner -- 4.2.3 Wire on a Substrate Backed by a Ground Plane -- 4.2.4 Wire Above a Substrate Backed by a Ground Plane -- 4.2.5 Curved Wire Connecting Substrates -- 4.2.6 Twisted Wire -- 4.2.7 Maximum Current Handling of Wires -- 4.3 Wire Models -- 4.3.1 Numerical Methods for Bond Wires -- 4.3.2 Measurement-Based Model for Air Core Inductors -- 4.3.3 Measurement-Based Model for Bond Wires -- 4.4 Broadband Inductors -- 4.5 Magnetic Materials -- References -- Chapter 5 Capacitors -- 5.1 Introduction -- 5.2 Capacitor Parameters -- 5.2.1 Capacitor Value -- 5.2.2 Effective Capacitance -- 5.2.3 Tolerances -- 5.2.4 Temperature Coefficient -- 5.2.5 Quality Factor -- 5.2.6 Equivalent Series Resistance -- 5.2.7 Series and Parallel Resonances -- 5.2.8 Dissipation Factor or Loss Tangent -- 5.2.9 Time Constant -- 5.2.10 Rated Voltage -- 5.2.11 Rated Current -- 5.3 Chip Capacitor Types -- 5.3.1 Multilayer Dielectric Capacitor -- 5.3.2 Multiplate Capacitor -- 5.4 Discrete Parallel Plate Capacitor Analysis -- 5.4.1 Vertically Mounted Series Capacitor -- 5.4.2 Flat-Mounted Series Capacitor -- 5.4.3 Flat-Mounted Shunt Capacitor -- 5.4.4 Measurement-Based Model -- 5.5 Voltage and Current Ratings -- 5.5.1 Maximum Voltage Rating -- 5.5.2 Maximum RF Current Rating -- 5.5.3 Maximum Power Dissipation -- 5.6 Capacitor Electrical Representation -- 5.6.1 Series and Shunt Connections -- 5.6.2 Network Representations -- References -- Chapter 6 Monolithic Capacitors -- 6.1 MIM Capacitor Models -- 6.1.1 Simple Lumped Equivalent Circuit -- 6.1.2 Single Microstrip-Based Distributed Model. 327 $a6.1.3 EC Model for MIM Capacitor on Si -- 6.1.4 EM Simulations of Capacitors -- 6.2 High-Density Capacitors -- 6.2.1 Multilayer Capacitors -- 6.2.2 Ultra-Thin-Film Capacitors -- 6.2.3 High-K Capacitors -- 6.2.4 Fractal Capacitors -- 6.2.5 Ferroelectric Capacitors -- 6.3 Capacitor Shapes -- 6.3.1 Rectangular Capacitors -- 6.3.2 Circular Capacitors -- 6.3.3 Octagonal Capacitors -- 6.4 Design Considerations -- 6.4.1 Q-Enhancement Techniques -- 6.4.2 Tunable Capacitor -- 6.4.3 Maximum Power Handling -- References -- Chapter 7 Interdigital Capacitors -- 7.1 Interdigital Capacitor Models -- 7.1.1 Approximate Analysis -- 7.1.2 Full-Wave Analysis -- 7.1.3 Measurement-Based Model -- 7.2 Design Considerations -- 7.2.1 Compact Size -- 7.2.2 Multilayer Capacitor -- 7.2.3 Q-Enhancement Techniques -- 7.2.4 Voltage Tunable Capacitor -- 7.2.5 High-Voltage Operation -- 7.3 Interdigital Structure as a Photodetector -- References -- Chapter 8 Resistors -- 8.1 Introduction -- 8.2 Basic Definitions -- 8.2.1 Power Rating -- 8.2.2 Temperature Coefficient -- 8.2.3 Resistor Tolerances -- 8.2.4 Maximum Working Voltage -- 8.2.5 Maximum Frequency of Operation -- 8.2.6 Stability -- 8.2.7 Noise -- 8.2.8 Maximum Current Rating -- 8.3 Resistor Types -- 8.3.1 Chip Resistors -- 8.3.2 MCM Resistors -- 8.3.3 Monolithic Resistors -- 8.4 High-Power Resistors -- 8.5 Resistor Models -- 8.5.1 EC Model -- 8.5.2 Distributed Model -- 8.5.3 Meander Line Resistor -- 8.6 Resistor Representations -- 8.6.1 Network Representations -- 8.6.2 Electrical Representations -- 8.7 Effective Conductivity -- 8.8 Thermistors -- References -- Chapter 9 Via Holes -- 9.1 Types of Via Holes -- 9.1.1 Via Hole Connection -- 9.1.2 Via Hole Ground -- 9.2 Via Hole Models -- 9.2.1 Analytical Expression -- 9.2.2 Quasi-static Method -- 9.2.3 Parallel Plate Waveguide Model -- 9.2.4 Method of Momen. 327 $a9.2.5 Measurement-Based Model -- 9.3 Via Fence -- 9.3.1 Coupling Between Via Holes -- 9.3.2 Radiation from Via Ground Plug -- 9.4 Plated Heat Sink Via -- 9.5 Via Hole Layout -- 9.6 Silicon Vias -- References -- Chapter 10 Airbridges and Dielectric Crossovers -- 10.1 Airbridge and Crossov -- 10.2 Analysis Techniques -- 10.2.1 Quasi-static Method -- 10.2.2 Full-Wave Analysis -- 10.3 Models -- 10.3.1 Analytical Model -- 10.3.2 Measurement-Based Model -- References -- Chapter 11 Inductor Transformers and Baluns -- 11.1 Basic Theory -- 11.1.1 Parameters Definition -- 11.1.2 Analysis of Transformers -- 11.1.3 Ideal Transformers -- 11.1.4 Equivalent Circuit Representation -- 11.1.5 Equivalent Circuit of a Practical Transformer -- 11.1.6 Wideband Impedance Matching Transformers -- 11.1.7 Types of Transformers -- 11.2 Wire-Wrapped Transformers -- 11.2.1 Tapped Coil Transformers -- 11.2.2 Bond Wire Transformer -- 11.3 Transmission-Line Type Transformers -- 11.4 Parallel Conductor Winding Transformers on Si Substrate -- 11.5 Spiral Transformers on GaAs Substrate -- 11.6 Baluns -- 11.6.1 Lumped-Element LP/HP Filter Baluns -- 11.6.2 Lumped-Element Power Divider and 180? Hybrid Baluns -- 11.6.3 Coil Transformer Baluns -- 11.6.4 Transmission-Line Baluns -- 11.6.5 Marchand Baluns -- 11.6.6 Common-Mode Rejection Ratio -- References -- Chapter 12 Lumped-Element Passive Components -- 12.1 Impedance Matching Techniques -- 12.1.1 One-Port and Two-Port Networks -- 12.1.2 Lumped-Element Narrowband Matching Techniques -- 12.1.3 Lumped-Element Wideband Matching Techniques -- 12.2 90? Hybrids -- 12.2.1 Broadband 3-dB 90? Hybrid -- 12.2.2 Reconfigurable 3-dB 90? Hybrid -- 12.2.3 Dual-Band 3-dB 90? Hybrid -- 12.2.4 Differential 3-dB 90? Hybrid -- 12.3 180? Hybrids -- 12.3.1 Compact Lumped-Element 3-dB 180? Hybrid -- 12.3.2 Wideband Lumped-Element Differential 3-dB 180? Hybrids. 327 $a12.4 Directional Couplers -- 12.4.1 Transformer Directional Couplers -- 12.4.3 Differential Directional Couplers -- 12.4.4 Directional Coupler with Impedance Matching -- 12.5 Power Dividers/Combiners -- 12.5.1 Power Dividers with 90? and 180? Phase Difference -- 12.5.2 Broadband 2-Way and 4-Way Power Dividers -- 12.5.3 Compact 2-Way and 4-Way Power Dividers -- 12.5.4 Dual-Band Power Dividers -- 12.5.5 Differential Power Dividers -- 12.6 Filter -- 12.6.1 Ceramic Lumped-Element LTCC Bandpass Filters -- 12.6.2 Dual-Band Filters -- 12.6.3 Reconfigurable and Switchable Filters -- 12.6.4 High Selectivity Compact BPF -- 12.6.5 Differential-Mode and Common-Mode Rejection Filters -- 12.6.6 Tunable BPF with Constant Bandwidth -- 12.6.7 Compact Si Bandpass Filter -- 12.6.8 Compact CMOS Bandpass Filters -- 12.7 Biasing Networks -- 12.7.1 Biasing of Diodes and Control Components -- 12.7.2 Biasing of Active Circuits -- References -- Chapter 13 Lumped-Element Control Components -- 13.1 Switches -- 13.1.1 Switch Configurations -- 13.1.2 Broadband Switches -- 13.1.3 MESFET Switches -- 13.1.4 HEMT Switches -- 13.1.5 CMOS Switches -- 13.1.6 GaN HEMT Switches -- 13.1.7 Comparison of Switch Technologies -- 13.2 Phase Shifters -- 13.2.1 Types of Phase Shifters -- 13.2.2 Switched-Network Phase Shifters -- 13.2.3 Multibit Phase Shifter Circuits -- 13.2.4 MESFET/HEMT Multibit Phase Shifters -- 13.2.5 CMOS Phase Shifters -- 13.2.6 Analog Phase Shifters -- 13.2.7 Broadband Phase Shifters -- 13.2.8 Ultrawideband Phase Shifters -- 13.2.9 Millimeter-Wave Phase Shifters -- 13.2.10 Active Phase Shifters -- 13.3 Attenuators -- 13.3.1 Attenuator Configurations -- 13.3.2 Multibit Attenuators -- 13.3.3 GaAs MMIC Step Attenuators -- 13.3.4 Si CMOS Step Attenuators -- 13.3.5 Variable Voltage Attenuators -- 13.3.6 GaN HEMT Attenuator -- 13.3.7 Phase Compensated Attenuators. 327 $a13.3.8 CMOS Attenuator with Integrated Switch. 330 8 $aFully updated and including entirely new chapters, this Second Edition provides in-depth coverage of the different types of RF and microwave circuit elements, including inductors, capacitors, resistors, transformers, via holes, airbridges, and crossovers. Featuring extensive formulas for lumped elements, design trade-offs, and an updated and current list of references, the book helps you understand the value and usefulness of lumped elements in the design of RF, microwave and millimeter wave components and circuits. You'll find a balanced treatment between standalone lumped elements and their circuits using MICs, MMICs and RFICs technologies. You'll also find detailed information on a broader range RFICs that was not available when the popular first edition was published. The book captures - in one consolidated volume -- the fundamentals, equations, modeling, examples, references and overall procedures to design, test and produce microwave components that are indispensable in industry and academia today. With its superb organization and expanded coverage of the subject, this is a must-have, go-to resource for practicing engineers and researchers in industry, government and university and microwave engineers working in the antenna area. Students will also find it a useful reference with its clear explanations, many examples and practical modeling guidelines. 606 $aLumped elements (Electronics) 615 0$aLumped elements (Electronics) 676 $a780 700 $aBahl$b Inder J.$067558 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 912 $a9910820644803321 996 $aLumped Elements for RF and Microwave Circuits$93960617 997 $aUNINA LEADER 04679nam 2200697 a 450 001 9911006765403321 005 20200520144314.0 010 $a9786612258541 010 $a9781282258549 010 $a1282258540 010 $a9780080950037 010 $a0080950035 010 $a9780080879079 010 $a0080879071 035 $a(CKB)1000000000790135 035 $a(EBL)453095 035 $a(OCoLC)500838232 035 $a(SSID)ssj0000332085 035 $a(PQKBManifestationID)11275242 035 $a(PQKBTitleCode)TC0000332085 035 $a(PQKBWorkID)10331313 035 $a(PQKB)10194144 035 $a(MiAaPQ)EBC453095 035 $a(CaSebORM)9781856176002 035 $a(OCoLC)892917608 035 $a(OCoLC)ocn892917608 035 $a(EXLCZ)991000000000790135 100 $a20090915d2009 uy 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aWell testing project management $eonshore and offshore operations /$fPaul J. Nardone 205 $a1st edition 210 $aAmsterdam $cElsevier/Gulf Professional Pub.$d2009 215 $a1 online resource (358 p.) 300 $aDescription based upon print version of record. 311 08$a9781856176002 311 08$a1856176002 320 $aIncludes bibliographical references (p. 331-334) and index. 327 $aFront Cover; Well Testing Project Management; Copyright Page; Contents; Acknowledgments; Preface; Chapter 1: Well Test Planning Environment; The Decision-Making Environment; The Regulatory Environment; The Local Environment; The Well Environment; The Challenging Environment; Role of the Well Test Engineer; New Technology; Chapter 2: Well Test Services; Working with Contractors; Perforating Service; Wireline Perforation Service; Tubing-Conveyed Perforating Service; Contingency Perforating; Depth Control; Tubing Services; Downhole Tools Service; Subsea Service; Surface Well Test Service 327 $aSampling ServiceGauge Service; Wireline Service; Slickline Service; Nitrogen Service; Coil Tubing Service; Chapter 3: Well Test Description; Well Test Equipment; Oil and Gas Measurements; Oil and Gas Well Tests; Common Well Test Engineering Challenges; Chapter 4: Planning Processes and Documents; Rig Visit; Logistics Plan; Test the Well on Paper; Safety Planning; Chapter 5: Engineered Controls; Pipework Sizing; Rig Interface Engineering; Design Review; Chapter 6: Planning for Safety; Safety and Company Policy; A Safety Case Approach; The Well Test Safety Case Revision 327 $aSafety Management SystemsFormal Safety Assessment; Risk Assessment; Hazard and Operability HAZOP; Quantitative Risk Analysis; Conclusion; Well-Site Planning Tools; Crew Integration; Pressure Testing; Demobilization; Chapter 8: Continuous Improvement; Recurrent Themes; Design Process; Planning Processes; Continuous Improvement Meeting Checklist; The Well Test Engineer Role; Appendix 1: Well Test Basis For Design; Overview; Design Features; Test Outline and Time Estimate; Appendix 3: Well Test Logistics Plan; Appendix 4: Well Test Equipment Inspection Guideline; Appendix 5: Well Test Program 327 $aOverviewPreparations; Critical Path Procedures; Test outline and Time Estimate; Appendix A Contingency Procedures; Appendix B Casing and Tubing Data; Appendix C Layout Drawing; Appendix D P & ID; Appendix 6: Roles and Responsibilities during a Well Test; Purpose; Roles and Responsibilities; Appendix 7: Wellsite Well Test Equipment Preparation Checklist; Overview; Glossary; References; Index 330 $aWell test planning is one of the most important phrases in the life cycle of a well, if done improperly it could cost millions. Now there is a reference to ensure you get it right the first time. Written by a Consultant Completions & Well Test Engineer with decades of experience, Well Test Planning and Operations provides a road map to guide the reader through the maze of governmental regulations, industry codes, local standards and practices. This book describes how to plan a fit-for-purpose and fault free well test, and to produce the documents required for regulatory compliance. Given the l 606 $aOil wells$xTesting$xManagement 606 $aProject management 615 0$aOil wells$xTesting$xManagement. 615 0$aProject management. 676 $a622.338 676 $a622/.3382 676 $a622.3382 700 $aNardone$b Paul J$01823340 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9911006765403321 996 $aWell testing project management$94389936 997 $aUNINA