LEADER 00823nam a2200241 i 4500 001 991002913709707536 005 20021022143957.0 008 960610s1927 fr ||| | fre 035 $ab11727639-39ule_inst 035 $aLE021FD222804$9ExL 040 $aDip. SSSC$bita 100 1 $aKoechlin, Charles$0529510 245 10$aDebussy /$cpar Charles Koechlin 260 $aParis :$bHenry Laurens,$c1927 300 $a119 p. :$bill. ;$c21 cm. 440 4$aLes musiciens celebres 650 4$aDebussy, Claude 907 $a.b11727639$b21-09-06$c24-10-02 912 $a991002913709707536 945 $aLE021FD MUS30bisC22$g1$iLE021FD-4734$lle023$nFondo D'Amico$o-$pE0.00$q-$rn$so $t0$u0$v0$w0$x0$y.i11967584$z24-10-02 996 $aDebussy$9904177 997 $aUNISALENTO 998 $ale021$b10-06-96$cm$da $e-$ffre$gfr $h0$i1 LEADER 05492nam 22007213u 450 001 9911006713003321 005 20240410031946.0 010 $a9780128023402 010 $a0128023406 010 $a9780128021323 010 $a0128021322 035 $a(CKB)3710000000430794 035 $a(EBL)2072012 035 $a(SSID)ssj0001611255 035 $a(PQKBManifestationID)16322986 035 $a(PQKBTitleCode)TC0001611255 035 $a(PQKBWorkID)14900333 035 $a(PQKB)11632747 035 $a(WaSeSS)IndRDA00069977 035 $a(OCoLC)915143486 035 $a(OCoLC)ocn915143486 035 $a(FR-PaCSA)88829552 035 $a(CaSebORM)9780128023402 035 $a(MiAaPQ)EBC2072012 035 $a(FRCYB88829552)88829552 035 $a(EXLCZ)993710000000430794 100 $a20150629d2015|||| u|| | 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aAdvances in Computers$hVolume 98 205 $aFirst edition. 210 1$aAmsterdam, Netherlands :$cElsevier,$d2015. 215 $a1 online resource (247 p.) 300 $aDescription based upon print version of record. 320 $aIncludes bibliographical references and indexes. 327 $aFront Cover; Advances in Computers; Copyright; Contents; Preface; Chapter One: An Overview of Architecture-Level Power- and Energy-Efficient Design Techniques; 1. Introduction; 2. Metrics of Interest; 2.1. Circuit-Level Metrics; 2.1.1. Basic Metrics; 2.1.2. Derived Metrics; 2.2. Architectural-Level Metrics; 3. Classification of Selected Architecture-Level Techniques; 3.1. Criteria; 3.2. List of Selected Examples; 3.3. Postclassification Conclusion; 4. Presentation of Selected Architecture-Level Techniques; 4.1. Core; 4.1.1. Dynamic; DVFS; OS Level; Compiler Analysis-Based DVFS 327 $aPower Phase Analysis-Based DVFSDVFS for Multiple Clock Domain Processors; Dynamic Work Steering; Optimizing Issue Width; 4.1.2. Static and Dynamic; Combined ABB and DVFS; 4.2. Core-Pipeline; 4.2.1. Dynamic; Clock Gating; Deterministic Clock Gating; Improving Energy Efficiency of Speculative Execution; Significance Compression; Work Reuse; Instruction-Level Reuse; Basic Block-Level Reuse; Trace-Level Reuse; Region Reuse; 4.3. Core-Front-End; 4.3.1. Dynamic; Exploiting Narrow-Width Operands; Instruction Queue Resizing; Loop Cache; Trace Cache; 4.3.2. Static; Idle Register File DVS 327 $aRegister File Access Optimization4.4. Core-Back-End; 4.4.1. Dynamic; Exploiting Narrow-Width Operands; Integers; Floating Point; Work Reuse; 4.4.2. Static; Power Gating; Vt-Based Technique; 4.5. Conclusion About the Existing Solutions; 5. Future Trend; 6. Conclusion; References; Chapter Two: A Survey of Research on Data Corruption in Cyber-Physical Critical Infrastructure Systems; 1. Introduction; 2. Sources of Corrupted Data; 3. Sensor Networks: Application for Comparison; 3.1. Sensor Network Database Requirements; 3.2. Sensor Network Architectures; 3.2.1. Centralized; 3.2.2. Distributed 327 $a3.3. Sensor Network Data Propagation4. Detection of Corrupted Data; 4.1. Statistical Detection; 4.1.1. Types of Data Anomalies; 4.1.2. Statistical Detection Approaches; 4.2. Behavioral Approaches; 5. Mitigation of Data Corruption; 6. Propagation of Corrupted Data; 6.1. Propagation from Execution; 6.2. Corrupted Data in a Sensor Node; 7. Conclusion and Future Direction; References; Chapter Three: A Research Overview of Tool-Supported Model-based Testing of Requirements-based Designs; 1. Introduction; 2. The Generic Model-based Testing Approach; 3. Proposed Taxonomy Dimensions 327 $a3.1. The Modeling Notation3.2. The Test Artifact; 3.3. Test Selection Criteria; 3.4. The Test Generation Method; 3.5. The Technology; 3.6. The Mapping; 4. A Research Review of Model-based Testing Tools; 4.1. Selection Criteria and Procedures for Including/Excluding Model-based Testing Tools; 4.2. Our Taxonomy; 5. Running Example: The Coffee/Tea Vending Machine; 6. Model-based Testing Tools for Pre/Post Notations; 6.1. The Z Language; 6.2. The B-Method; 6.3. Spec#; 6.4. AsmL; 6.5. The Coffee/Tea Vending Machine in ProTest; 7. Model-based Testing Tools for Transition-based Notations 327 $a7.1. Finite State Machines 330 $aSince its first volume in 1960, Advances in Computers has presented detailed coverage of innovations in computer hardware, software, theory, design, and applications. It has also provided contributors with a medium in which they can explore their subjects in greater depth and breadth than journal articles usually allow. As a result, many articles have become standard references that continue to be of sugnificant, lasting value in this rapidly expanding field.In-depth surveys and tutorials on new computer technologyWell-known authors and researchers in the fieldExtensive bibliographies with mos 517 1 $aAdvances in computers. 606 $aComputers 606 $aGraphical user interfaces (Computer systems) 606 $aSystem analysis 615 4$aComputers. 615 4$aGraphical user interfaces (Computer systems). 615 4$aSystem analysis. 676 $a005.12 676 $a005.12 700 $aHurson$b A. R$01824597 702 $aHurson$b A. R 801 0$bAU-PeEL 801 1$bAU-PeEL 801 2$bAU-PeEL 906 $aBOOK 912 $a9911006713003321 996 $aAdvances in Computers$94391811 997 $aUNINA