LEADER 01034nam0-2200313---450- 001 990009732650403321 005 20130521122536.0 035 $a000973265 035 $aFED01000973265 035 $a(Aleph)000973265FED01 035 $a000973265 100 $a20130521d1966----km-y0itay50------ba 101 0 $aeng 102 $aCA 105 $aa-------001yy 200 1 $aWater resources of Canada$esymposia presented to the Royal Society of Canada in 1966$d= Ressources hydrauliques du Canada$ecolloques présentés à la Société Royale du Canada en 1966$fedited by Claude E. Dolman 210 $aToronto$cUniversity of Toronto press$d1967 215 $aXVIII, 251 p.$cill.$d24 cm 225 1 $aStudia varia$v11 510 1 $aRessources hydrauliques du Canada 610 0 $aIdrogeologia 702 1$aDolman,$bClaude E. 801 0$aIT$bUNINA$gRICA$2UNIMARC 901 $aBK 912 $a990009732650403321 952 $aMA4/36$b12302$fDINGE 959 $aDINGE 996 $aWater resources of Canada$9842793 997 $aUNINA LEADER 05506nam 2200709Ia 450 001 9910969199003321 005 20250901110212.0 010 $a1-322-46554-1 010 $a1-281-76645-3 010 $a9786611766450 010 $a0-08-055384-2 035 $a(CKB)1000000000547713 035 $a(EBL)404750 035 $a(OCoLC)437245624 035 $a(SSID)ssj0000201145 035 $a(PQKBManifestationID)11168622 035 $a(PQKBTitleCode)TC0000201145 035 $a(PQKBWorkID)10231588 035 $a(PQKB)11675964 035 $a(Au-PeEL)EBL404750 035 $a(CaPaEBR)ebr10371769 035 $a(CaONFJC)MIL176645 035 $a(CaSebORM)9780123797513 035 $a(MiAaPQ)EBC404750 035 $a(EXLCZ)991000000000547713 100 $a20071116d2008 uy 0 101 0 $aeng 135 $aurcn||||||||| 181 $ctxt 182 $cc 183 $acr 200 10$aMemory systems $ecache, DRAM, disk /$fBruce Jacob, Spencer W. Ng, David T. Wang; with contributions by Samuel Rodriguez 205 $a1st edition 210 $aSan Francisco, CA $cMorgan Kaufmann ;$aOxford $cElsevier Science [distributor]$d2008 215 $a1 online resource (1017 p.) 300 $aDescription based upon print version of record. 311 08$a0-12-322980-4 311 08$a0-12-379751-9 327 $aFront Cover; In Praise of Memory Systems: Cache, DRAM, Disk; Memory Systems Cache, DRAM, Disk; Copyright Page; Contents; Preface; Overview. On Memory Systems and Their Design; Ov.1 Memory Systems; Ov.2 Four Anecdotes on Modular Design; Ov.3 Cross-Cutting Issues; Ov.4 An Example Holistic Analysis; Ov.5 What to Expect; Part I. Cache; Chapter 1. An Overview of Cache Principles; 1.1 Caches, 'Caches,' and "Caches"; 1.2 Locality Principles; 1.3 What to Cache, Where to Put It, and How to Maintain It; 1.4 Insights and Optimizations; Chapter 2. Logical Organization 327 $a2.1 Logical Organization: A Taxonomy 2.2 Transparently Addressed Caches; 2.3 Non-Transparently Addressed Caches; 2.4 Virtual Addressing and Protection; 2.5 Distributed and Partitioned Caches; 2.6 Case Studies; Chapter 3. Management of Cache Contents; 3.1 Case Studies: On-Line Heuristics; 3.2 Case Studies: Off-Line Heuristics; 3.3 Case Studies: Combined Approaches; 3.4 Discussions; 3.5 Building a Content-Management; Chapter 4. Management of Cache Consistency; 4.1 Consistency with Backing Store; 4.2 Consistency with Self; 4.3 Consistency with Other Clients; Chapter 5. Implementation Issues 327 $a5.1 Overview 5.2 SRAM Implementation; 5.3 Advanced SRAM Topics; 5.4 Cache Implementation; Chapter 6. Cache Case Studies; 6.1 Logical Organization; 6.2 Pipeline Interface; 6.3 Case Studies of Detailed Itanium-2 Circuits; Part II. DRAM; Chapter 7. Overview of DRAMs; 7.1 DRAM Basics: Internals, Operation; 7.2 Evolution of the DRAM Architecture; 7.3 Modern-Day DRAM Standards; 7.4 Fully Buffered DIMM: A Compromise of Sorts; 7.5 Issues in DRAM Systems, Briefly; Chapter 8. DRAM Device Organization: Basic Circuits and Architecture; 8.1 DRAM Device Organization; 8.2 DRAM Storage Cells 327 $a8.3 RAM Array Structures 8.4 Differential Sense Amplifier; 8.5 Decoders and Redundancy; 8.6 DRAM Device Control Logic; 8.7 DRAM Device Configuration; 8.8 Data I/O; 8.9 DRAM Device Packaging; 8.10 DRAM Process Technology and Process Scaling Considerations; Chapter 9. DRAM System Signaling and Timing; 9.1 Signaling System; 9.2 Transmission Lines on PCBs; 9.3 Termination; 9.4 Signaling; 9.5 Timing Synchronization; 9.6 Selected DRAM Signaling and Timing Issues; 9.7 Summary; Chapter 10. DRAM Memory System Organization; 10.1 Conventional Memory System; 10.2 Basic Nomenclature; 10.3 Memory Modules 327 $a10.4 Memory System Topology 10.5 Summary; Chapter 11. Basic DRAM Memory-Access Protocol; 11.1 Basic DRAM Commands; 11.2 DRAM Command Interactions; 11.3 Additional Constraints; 11.4 Command Timing Summary; 11.5 Summary; Chapter 12. Evolutionary Developments of DRAM Device Architecture; 12.1 DRAM Device Families; 12.2 Historical-Commodity DRAM Devices; 12.3 Modern-Commodity DRAM Devices; 12.4 High Bandwidth Path; 12.5 Low Latency; 12.6 Interesting Alternatives; Chapter 13. DRAM Memory Controller; 13.1 DRAM Controller Architecture; 13.2 Row-Buffer-Management Policy 327 $a13.3 Address Mapping (Translation) 330 $aBones and Cartilage provides the most in-depth review ever assembled on the topic. It examines the function, development and evolution of bone and cartilage as tissues, organs and skeletal systems. It describes how bone and cartilage is developed in embryos and are maintained in adults, how bone reappears when we break a leg, or even regenerates when a newt grows a new limb, or a lizard a tail. This book also looks at the molecules and cells that make bones and cartilages and how they differ in various parts of the body and across species. It answers such questions as "Is bone always 606 $aComputer storage devices 606 $aComputer input-output equipment 615 0$aComputer storage devices. 615 0$aComputer input-output equipment. 676 $a004.5 676 $a004.5 22 676 $a004.5 700 $aJacob$b Bruce$0863856 701 $aNg$b Spencer W$01845272 701 $aWang$b David$01845273 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910969199003321 996 $aMemory systems$94429128 997 $aUNINA