LEADER 01847oam 2200433zu 450 001 9910872898803321 005 20241212214840.0 035 $a(CKB)111026746716050 035 $a(SSID)ssj0000444059 035 $a(PQKBManifestationID)12140675 035 $a(PQKBTitleCode)TC0000444059 035 $a(PQKBWorkID)10462381 035 $a(PQKB)10740205 035 $a(NjHacI)99111026746716050 035 $a(EXLCZ)99111026746716050 100 $a20160829d1996 uy 101 0 $aeng 135 $aur||||||||||| 181 $ctxt 182 $cc 183 $acr 200 10$aProceedings of the Ninth Annual IEEE International ASIC Conference and Exhibit 210 31$a[Place of publication not identified]$cIEEE$d1996 215 $a1 online resource (500 pages) 300 $aBibliographic Level Mode of Issuance: Monograph 311 08$a9780780333024 311 08$a0780333020 330 $aThe implications for ASIC product design on VLSI chips are examined in this proceeding. Projection of current trends of circuit compaction onto smaller chips introduces economic savings that are described. Impact for consumer and industrial products expansion into new applications are examined. 606 $aApplication-specific integrated circuits$xDesign$xData processing$vCongresses 606 $aApplication-specific integrated circuits$xDesign and construction$vCongresses 615 0$aApplication-specific integrated circuits$xDesign$xData processing 615 0$aApplication-specific integrated circuits$xDesign and construction 676 $a621.395 712 02$aIEEE, Institute of Electrical and Electronics Engineers, Inc. Staff 801 0$bPQKB 906 $aBOOK 912 $a9910872898803321 996 $aProceedings of the Ninth Annual IEEE International ASIC Conference and Exhibit$92501340 997 $aUNINA