LEADER 00781nam0-22003011i-450- 001 990000040350403321 035 $a000004035 035 $aFED01000004035 035 $a(Aleph)000004035FED01 035 $a000004035 100 $a20011111d--------km-y0itay50------ba 101 0 $aita 105 $ay-------001yy 200 1 $aDisegno geometrico$fA. Antilli. 205 $a2. ed. aumentata. 210 $aMilano$cU.Hoepli$d1897 215 $aVII, 87, 60 p.$cill., 28 tav. f.t.$d16 cm 225 1 $aManuali Hoepli 610 0 $aDisegno geometrico 676 $a516.6 700 1$aAntilli,$bA. 801 0$aIT$bUNINA$gRICA$2UNIMARC 901 $aBK 912 $a990000040350403321 952 $a13 AR 13 A 41$b2722$fFINBC 959 $aFINBC 997 $aUNINA DB $aING01 LEADER 01814oam 2200493zu 450 001 9910872833003321 005 20241212215055.0 035 $a(CKB)111055184226254 035 $a(SSID)ssj0000395239 035 $a(PQKBManifestationID)12154929 035 $a(PQKBTitleCode)TC0000395239 035 $a(PQKBWorkID)10450383 035 $a(PQKB)11049228 035 $a(EXLCZ)99111055184226254 100 $a20160829d2000 uy 101 0 $aeng 181 $ctxt 182 $cc 183 $acr 200 10$aInnovative architecture for future generation high-performance processors and systems : 18-19 January, 2001, Maui, Hawaii 210 31$a[Place of publication not identified]$cIEEE Computer Society$d2000 300 $aBibliographic Level Mode of Issuance: Monograph 311 08$a9780769513096 311 08$a0769513093 606 $aComputer architecture$vCongresses 606 $aHigh performance computing$vCongresses 606 $aHigh performance processors$vCongresses 606 $aEngineering & Applied Sciences$2HILCC 606 $aComputer Science$2HILCC 615 0$aComputer architecture 615 0$aHigh performance computing 615 0$aHigh performance processors 615 7$aEngineering & Applied Sciences 615 7$aComputer Science 702 $aVeidenbaum$b Alex 702 $aJoe$b Kazuki 712 02$aDARPA/ITO PAC/C Program. 712 02$aMaui High-Performance Computing Center. 712 12$aInternational Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems 801 0$bPQKB 906 $aPROCEEDING 912 $a9910872833003321 996 $aInnovative architecture for future generation high-performance processors and systems : 18-19 January, 2001, Maui, Hawaii$92349284 997 $aUNINA