LEADER 01857oam  2200481zu 450 
001 9910872746003321
005 20210807003411.0
035   $a(CKB)111026746738630
035   $a(SSID)ssj0000396431
035   $a(PQKBManifestationID)12138768
035   $a(PQKBTitleCode)TC0000396431
035   $a(PQKBWorkID)10465039
035   $a(PQKB)11504310
035   $a(EXLCZ)99111026746738630
100   $a20160829d1994      uy 
101 0 $aeng
181   $ctxt
182   $cc
183   $acr
200 10$aRecords of the IEEE International Workshop on Memory Technology, Design, and Testing, August 8-9, 1994, San Jose, California
210 31$a[Place of publication not identified]$cIEEE Computer Society Press$d1994
300   $aBibliographic Level Mode of Issuance: Monograph
311   $a0-8186-6245-X 
606   $aSemiconductor storage devices$xCongresses$xTesting
606   $aRandom access memory$xCongresses
606   $aElectrical & Computer Engineering$2HILCC
606   $aEngineering & Applied Sciences$2HILCC
606   $aElectrical Engineering$2HILCC
615  0$aSemiconductor storage devices$xCongresses$xTesting
615  0$aRandom access memory$xCongresses
615  7$aElectrical & Computer Engineering
615  7$aEngineering & Applied Sciences
615  7$aElectrical Engineering
676   $a621.39/732
702   $aRajsuman$b Rochit
712 02$aIEEE Computer Society Test Technology Technical Committee
712 02$aIEEE Computer Society Technical Committee on VLSI,
712 12$aIEEE International Workshop on Memory Technology, Design, and Testing
801  0$bPQKB
906   $aBOOK
912   $a9910872746003321
996   $aRecords of the IEEE International Workshop on Memory Technology, Design, and Testing, August 8-9, 1994, San Jose, California$92506142
997   $aUNINA