LEADER 02004oam 2200529zu 450 001 9910872702303321 005 20241212215048.0 035 $a(CKB)111055184228438 035 $a(SSID)ssj0000395443 035 $a(PQKBManifestationID)12084995 035 $a(PQKBTitleCode)TC0000395443 035 $a(PQKBWorkID)10450598 035 $a(PQKB)10557469 035 $a(EXLCZ)99111055184228438 100 $a20160829d2002 uy 101 0 $aeng 181 $ctxt 182 $cc 183 $acr 200 10$aProceedings of the 2002 IEEE International Workshop on Memory Technology, Design and Testing : (MTDT 2002) : 10-12 July, 2002, Isle of Bendor, France 210 31$a[Place of publication not identified]$cIEEE Computer Society$d2002 300 $aBibliographic Level Mode of Issuance: Monograph 311 08$a9780769516172 311 08$a0769516173 606 $aSemiconductor storage devices$xTesting$vCongresses 606 $aRandom access memory$vCongresses 606 $aElectrical & Computer Engineering$2HILCC 606 $aEngineering & Applied Sciences$2HILCC 606 $aElectrical Engineering$2HILCC 615 0$aSemiconductor storage devices$xTesting 615 0$aRandom access memory 615 7$aElectrical & Computer Engineering 615 7$aEngineering & Applied Sciences 615 7$aElectrical Engineering 676 $a621.39/732 702 $aWik$b T 702 $aCourtois$b B 702 $aZorian$b Yervant 712 02$aIEEE Computer Society 712 02$aIEEE Computer Society Technical Council on Test Technology. 712 02$aIEEE Computer Society Technical Committee on VLSI, 712 12$aIEEE International Workshop on Memory Technology, Design, and Testing. 801 0$bPQKB 906 $aPROCEEDING 912 $a9910872702303321 996 $aProceedings of the 2002 IEEE International Workshop on Memory Technology, Design and Testing : (MTDT 2002) : 10-12 July, 2002, Isle of Bendor, France$92372861 997 $aUNINA