LEADER 01860oam  2200397zu 450 
001 9910872659703321
005 20241212214805.0
035   $a(CKB)111026746700294
035   $a(SSID)ssj0000558311
035   $a(PQKBManifestationID)12197969
035   $a(PQKBTitleCode)TC0000558311
035   $a(PQKBWorkID)10558269
035   $a(PQKB)11266474
035   $a(NjHacI)99111026746700294
035   $a(EXLCZ)99111026746700294
100   $a20160829d1999      uy 
101 0 $aeng
135   $aur|||||||||||
181   $ctxt
182   $cc
183   $acr
200 10$aVIUF Fall Workshop: Proceedings Workshop, Orlando, Florida, 1999
210 31$a[Place of publication not identified]$cIEEE Computer Society Press$d1999
215   $a1 online resource (200 pages)
300   $aBibliographic Level Mode of Issuance: Monograph
311 08$a9780769504650 
311 08$a0769504655 
330   $aContains 14 papers presented at the October 1999 conference, along with abstracts of the five workshops held. The papers discuss design reuse, test and functional verification, and business issues. Among the topics are reusable test environments for digital designs, OBDD extraction from VHDL gate level descriptions at design elaboration, hardware/software co-design for IP objects based on CORBA, strategic management issues for starting an IP company, and VHDL modeling of an adaptive architecture for real-time image enhancement. No subject index. Annotation copyrighted by Book News, Inc., Portland, OR.
606   $aElectronic circuit design$xData processing$vCongresses
615  0$aElectronic circuit design$xData processing
676   $a621.38150285
801  0$bPQKB
906   $aPROCEEDING
912   $a9910872659703321
996   $aVIUF Fall Workshop: Proceedings Workshop, Orlando, Florida, 1999$92419495
997   $aUNINA