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101 0 $aeng
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181   $ctxt
182   $cc
183   $acr
200 10$a2000 IEEE/ACM International Conference on Computer-Aided Design
210 31$a[Place of publication not identified]$cI E E E$d2000
215   $a1 online resource (xxv, 575 pages)
300   $aBibliographic Level Mode of Issuance: Monograph
311 08$a9780780364455 
311 08$a0780364457 
330   $aPower efficient design of real-time embedded systems based on programmable processors becomes more important as system functionality is increasingly realized through software. This paper presents a power optimization method for real-time embedded applications on a variable speed processor. The method combines off-line and on-line components. The off-line component determines the lowest possible maximum processor speed while guaranteeing deadlines of all tasks. The on-line component dynamically varies the processor speed or brings a processor into a power-down mode according to the status of task set in order to exploit execution time variations and idle intervals. Experimental results show that the proposed method obtains a significant power reduction across several kinds of applications.
606   $aComputer-aided design$vCongresses
615  0$aComputer-aided design
676   $a620.0042
712 02$aIEEE, Institute of Electrical and Electronics Engineers, Inc. Staff
801  0$bPQKB
906   $aPROCEEDING
912   $a9910872657103321
996   $a2000 IEEE$92353420
997   $aUNINA