LEADER 01945oam  2200469zu 450 
001 9910872558103321
005 20210807000258.0
035   $a(CKB)1000000000021737
035   $a(SSID)ssj0000393962
035   $a(PQKBManifestationID)12108585
035   $a(PQKBTitleCode)TC0000393962
035   $a(PQKBWorkID)10386407
035   $a(PQKB)10832955
035   $a(EXLCZ)991000000000021737
100   $a20160829d2003      uy 
101 0 $aeng
181   $ctxt
182   $cc
183   $acr
200 10$a18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems : proceedings : 3-5 November, 2003, Boston, Massachusetts
210 31$a[Place of publication not identified]$cIEEE Computer Society Press$d2003
300   $aBibliographic Level Mode of Issuance: Monograph
311   $a0-7695-2042-1 
606   $aIntegrated circuits$xDesign and construction$xVery large scale integration$vCongresses
606   $aFault-tolerant computing$vCongresses
606   $aElectrical & Computer Engineering$2HILCC
606   $aElectrical Engineering$2HILCC
606   $aEngineering & Applied Sciences$2HILCC
615  0$aIntegrated circuits$xDesign and construction$xVery large scale integration
615  0$aFault-tolerant computing
615  7$aElectrical & Computer Engineering
615  7$aElectrical Engineering
615  7$aEngineering & Applied Sciences
702   $aBolchini$b Cristiana
712 02$aIEEE Computer Society Fault-Tolerant Computing Technical Committee.
712 02$aIEEE Computer Society Test Technology Technical Committee
712 12$aIEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
801  0$bPQKB
906   $aPROCEEDING
912   $a9910872558103321
996   $a18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems : proceedings : 3-5 November, 2003, Boston, Massachusetts$92378645
997   $aUNINA