LEADER 01964oam 2200517zu 450 001 9910872516103321 005 20210807000234.0 035 $a(CKB)1000000000021866 035 $a(SSID)ssj0000395445 035 $a(PQKBManifestationID)12122315 035 $a(PQKBTitleCode)TC0000395445 035 $a(PQKBWorkID)10454913 035 $a(PQKB)11044342 035 $a(EXLCZ)991000000000021866 100 $a20160829d2004 uy 101 0 $aeng 135 $aurmnu---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aMTDT 2004 : records of the 2004 International Workshop on Memory Technology, Design and Testing : 9-10 August, 2004, San Jose, California, USA 210 31$a[Place of publication not identified]$cIEEE Computer Society$d2004 300 $aBibliographic Level Mode of Issuance: Monograph 311 $a0-7695-2193-2 606 $aSemiconductor storage devices$xTesting$vCongresses 606 $aRandom access memory$vCongresses 606 $aElectrical & Computer Engineering$2HILCC 606 $aEngineering & Applied Sciences$2HILCC 606 $aElectrical Engineering$2HILCC 615 0$aSemiconductor storage devices$xTesting 615 0$aRandom access memory 615 7$aElectrical & Computer Engineering 615 7$aEngineering & Applied Sciences 615 7$aElectrical Engineering 676 $a621.39/732 702 $aRajsuman$b Rochit 702 $aWik$b T 712 02$aIEEE Computer Society 712 02$aIEEE Computer Society Technical Council on Test Technology. 712 02$aIEEE Computer Society Technical Committee on VLSI, 712 12$aIEEE International Workshop on Memory Technology, Design and Testing 801 0$bPQKB 906 $aPROCEEDING 912 $a9910872516103321 996 $aMTDT 2004 : records of the 2004 International Workshop on Memory Technology, Design and Testing : 9-10 August, 2004, San Jose, California, USA$92408685 997 $aUNINA