LEADER 05792nam 2200733 a 450 001 9910841043903321 005 20210906114714.0 010 $a1-283-02557-4 010 $a9786613025579 010 $a0-470-93201-5 010 $a0-470-93202-3 035 $a(CKB)3400000000000290 035 $a(EBL)675087 035 $a(SSID)ssj0000466836 035 $a(PQKBManifestationID)11327726 035 $a(PQKBTitleCode)TC0000466836 035 $a(PQKBWorkID)10466687 035 $a(PQKB)11785553 035 $a(MiAaPQ)EBC675087 035 $a(WaSeSS)Ind00022683 035 $a(OCoLC)711779383 035 $a(CaSebORM)9780470934630 035 $a(PPN)153938773 035 $a(EXLCZ)993400000000000290 100 $a20101012d2011 uy 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aAlgorithms and parallel computing$b[electronic resource] /$fFayez Gebali 205 $a1st edition 210 $aHoboken, N.J. $cWiley$d2011 215 $a1 online resource (365 p.) 225 1 $aWiley series on parallel and distributed computing ;$v82 300 $aDescription based upon print version of record. 311 $a0-470-93463-8 311 $a0-470-90210-8 320 $aIncludes bibliographical references and index. 327 $aAlgorithms and Parallel Computing; Contents; Preface; List of Acronyms; Chapter 1: Introduction; 1.1 INTRODUCTION; 1.2 TOWARD AUTOMATING PARALLEL PROGRAMMING; 1.3 ALGORITHMS; 1.4 PARALLEL COMPUTING DESIGN CONSIDERATIONS; 1.5 PARALLEL ALGORITHMS AND PARALLEL ARCHITECTURES; 1.6 RELATING PARALLEL ALGORITHM AND PARALLEL ARCHITECTURE; 1.7 IMPLEMENTATION OF ALGORITHMS: A TWO-SIDED PROBLEM; 1.8 MEASURING BENEFITS OF PARALLEL COMPUTING; 1.9 AMDAHL'S LAW FOR MULTIPROCESSOR SYSTEMS; 1.10 GUSTAFSON-BARSIS'S LAW; 1.11 APPLICATIONS OF PARALLEL COMPUTING; Chapter 2: Enhancing Uniprocessor Performance 327 $a2.1 INTRODUCTION2.2 INCREASING PROCESSOR CLOCK FREQUENCY; 2.3 PARALLELIZING ALU STRUCTURE; 2.4 USING MEMORY HIERARCHY; 2.5 PIPELINING; 2.6 VERY LONG INSTRUCTION WORD (VLIW) PROCESSORS; 2.7 INSTRUCTION-LEVEL PARALLELISM (ILP) AND SUPERSCALAR PROCESSORS; 2.8 MULTITHREADED PROCESSOR; Chapter 3: Parallel Computers; 3.1 INTRODUCTION; 3.2 PARALLEL COMPUTING; 3.3 SHARED-MEMORY MULTIPROCESSORS (UNIFORM MEMORY ACCESS [UMA]); 3.4 DISTRIBUTED-MEMORY MULTIPROCESSOR (NONUNIFORM MEMORY ACCESS [NUMA]); 3.5 SIMD PROCESSORS; 3.6 SYSTOLIC PROCESSORS; 3.7 CLUSTER COMPUTING; 3.8 GRID (CLOUD) COMPUTING 327 $a3.9 MULTICORE SYSTEMS3.10 SM; 3.11 COMMUNICATION BETWEEN PARALLEL PROCESSORS; 3.12 SUMMARY OF PARALLEL ARCHITECTURES; Chapter 4: Shared-Memory Multiprocessors; 4.1 INTRODUCTION; 4.2 CACHE COHERENCE AND MEMORY CONSISTENCY; 4.3 SYNCHRONIZATION AND MUTUAL EXCLUSION; Chapter 5: Interconnection Networks; 5.1 INTRODUCTION; 5.2 CLASSIFICATION OF INTERCONNECTION NETWORKS BY LOGICAL TOPOLOGIES; 5.3 INTERCONNECTION NETWORK SWITCH ARCHITECTURE; Chapter 6: Concurrency Platforms; 6.1 INTRODUCTION; 6.2 CONCURRENCY PLATFORMS; 6.3 CILK++; 6.4 OpenMP; 6.5 COMPUTE UNIFIED DEVICE ARCHITECTURE (CUDA) 327 $aChapter 7: Ad Hoc Techniques for Parallel Algorithms7.1 INTRODUCTION; 7.2 DEFINING ALGORITHM VARIABLES; 7.3 INDEPENDENT LOOP SCHEDULING; 7.4 DEPENDENT LOOPS; 7.5 LOOP SPREADING FOR SIMPLE DEPENDENT LOOPS; 7.6 LOOP UNROLLING; 7.7 PROBLEM PARTITIONING; 7.8 DIVIDE-AND-CONQUER (RECURSIVE PARTITIONING) STRATEGIES; 7.9 PIPELINING; Chapter 8: Nonserial-Parallel Algorithms; 8.1 INTRODUCTION; 8.2 COMPARING DAG AND DCG ALGORITHMS; 8.3 PARALLELIZING NSPA ALGORITHMS REPRESENTED BY A DAG; 8.4 FORMAL TECHNIQUE FOR ANALYZING NSPAs; 8.5 DETECTING CYCLES IN THE ALGORITHM 327 $a8.6 EXTRACTING SERIAL AND PARALLEL ALGORITHM PERFORMANCE PARAMETERS8.7 USEFUL THEOREMS; 8.8 PERFORMANCE OF SERIAL AND PARALLEL ALGORITHMS ON PARALLEL COMPUTERS; Chapter 9: z-Transform Analysis; 9.1 INTRODUCTION; 9.2 DEFINITION OF z-TRANSFORM; 9.3 THE 1-D FIR DIGITAL FILTER ALGORITHM; 9.4 SOFTWARE AND HARDWARE IMPLEMENTATIONS OF THE z-TRANSFORM; 9.5 DESIGN 1: USING HORNER'S RULE FOR BROADCAST INPUT AND PIPELINED OUTPUT; 9.6 DESIGN 2: PIPELINED INPUT AND BROADCAST OUTPUT; 9.7 DESIGN 3: PIPELINED INPUT AND OUTPUT; Chapter 10: Dependence Graph Analysis; 10.1 INTRODUCTION 327 $a10.2 THE 1-D FIR DIGITAL FILTER ALGORITHM 330 $a"There is a software gap between the hardware potential and the performance that can be attained using today's software parallel program development tools. The tools need manual intervention by the programmer to parallelize the code. Programming a parallel computer requires closely studying the target algorithm or application, more so than in the traditional sequential programming we have all learned. The programmer must be aware of the communication and data dependencies of the algorithm or application. This book provides the techniques to explore the possible ways to program a parallel computer for a given application"--$cProvided by publisher. 330 $a"This book provides the techniques to explore the possible ways to program a parallel computer for a given application"--$cProvided by publisher. 410 0$aWiley series on parallel and distributed computing ;$v82. 606 $aParallel processing (Electronic computers) 606 $aComputer algorithms 615 0$aParallel processing (Electronic computers) 615 0$aComputer algorithms. 676 $a004.35 676 $a004/.35 676 $a005.275 686 $aCOM043000$2bisacsh 700 $aGebali$b Fayez$0720885 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910841043903321 996 $aAlgorithms and parallel computing$94138185 997 $aUNINA