LEADER 00902nam0-22002891i-450- 001 990000495840403321 005 20100226134420.0 035 $a000049584 035 $aFED01000049584 035 $a(Aleph)000049584FED01 035 $a000049584 100 $a20020821d1987----km-y0itay50------ba 101 0 $afre 105 $ay-------001yy 200 1 $aTheorie des reseaux de Kirchhoff vol. 4$fRené Boite, Jacques Neirynck 210 $aSt-Saphorin$cGeorgi$d1987 215 $a317 p.$cill.$d24 cm 225 1 $aTraité d'électricité de l'Ecole polytechnique fédérale de Lausanne$v4 700 1$aBoite,$bRene'$026789 701 1$aNeirynck,$bJacques$f<1931- >$026357 801 0$aIT$bUNINA$gRICA$2UNIMARC 901 $aBK 912 $a990000495840403321 952 $a10 F II 8/4$b242 DEE$fDINEL 959 $aDINEL 996 $aTheorie des reseaux de Kirchhoff vol. 4$9333226 997 $aUNINA LEADER 03579nam 22007215 450 001 9910831011003321 005 20240628134211.0 010 $a981-9977-55-X 024 7 $a10.1007/978-981-99-7755-0 035 $a(MiAaPQ)EBC31098219 035 $a(Au-PeEL)EBL31098219 035 $a(MiAaPQ)EBC31132805 035 $a(Au-PeEL)EBL31132805 035 $a(OCoLC)1420629926 035 $a(DE-He213)978-981-99-7755-0 035 $a(CKB)30182177700041 035 $a(EXLCZ)9930182177700041 100 $a20240131d2024 u| 0 101 0 $aeng 135 $aurcnu|||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aFPGA EDA $eDesign Principles and Implementation /$fby Kaihui Tu, Xifan Tang, Cunxi Yu, Lana Josipovi?, Zhufei Chu 205 $a1st ed. 2024. 210 1$aSingapore :$cSpringer Nature Singapore :$cImprint: Springer,$d2024. 215 $a1 online resource (229 pages) 311 08$aPrint version: Tu, Kaihui Fpga Eda Singapore : Springer Singapore Pte. Limited,c2024 9789819977543 327 $aIntroduction -- Device(Chip Design) Modelling -- Design(Application Design) Modelling -- Power Analysis -- Performance(Timing) Analysis -- Area Analysis -- Semi-custom EDA -- High-Level Synthesis -- Logic Synthesis -- Physical Implementation -- Bitstream Configuration -- Summary and Outlook. 330 $aThis book focuses on FPGA EDA tools, the very foundation of FPGA technology. Instead of illustrating how to use them, this book dives into the tools themselves, revealing how these tools are being designed and how they may improve. Unlike other semiconductors, FPGA has a distinctive two-stage EDA system: chip design EDA and application design EDA.State-of-the-art algorithms, data models and design methodologies/standards are the main concerns of this book, and these will be very helpful for FPGA EDA engineers and researchers to obtain a bird?s eye view of this complicated knowledge system. In the chip design EDA part, full-custom and semicustom methodologies bring up ASIC-like EDA tools, and in the application design EDA side, typical topics including high-level synthesis, logic synthesis, physical implementation, bitstream configuration, etc., are well discussed. 606 $aComputer-aided engineering 606 $aCompilers (Computer programs) 606 $aC++ (Computer program language) 606 $aOpen source software 606 $aComputer science 606 $aComputer hardware description languages 606 $aComputer-Aided Engineering (CAD, CAE) and Design 606 $aCompilers and Interpreters 606 $aC++ 606 $aOpen Source 606 $aTheory and Algorithms for Application Domains 606 $aRegister-Transfer-Level Implementation 615 0$aComputer-aided engineering. 615 0$aCompilers (Computer programs) 615 0$aC++ (Computer program language). 615 0$aOpen source software. 615 0$aComputer science. 615 0$aComputer hardware description languages. 615 14$aComputer-Aided Engineering (CAD, CAE) and Design. 615 24$aCompilers and Interpreters. 615 24$aC++. 615 24$aOpen Source. 615 24$aTheory and Algorithms for Application Domains. 615 24$aRegister-Transfer-Level Implementation. 676 $a621.395 700 $aTu$b Kaihui$01631591 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910831011003321 996 $aFpga Eda$93970419 997 $aUNINA