LEADER 01044nam0-22003731i-450 001 990002567460403321 005 20191120105047.0 010 $a0121743500 035 $a000256746 035 $aFED01000256746 035 $a(Aleph)000256746FED01 035 $a000256746 100 $a20030910d1975----km-y0itay50------ba 101 0 $aeng 200 1 $aGraph theory$ean algorithmic approach$fN. Christofides 210 $aNew York$aLondon$cAcademic Press$d1975 215 $aXV, 400 p.$d23 cm 225 1 $aComputer science and applied mathematics 610 0 $aTeoria dei grafi, Combinatorica 676 $a511 700 1$aChristofides,$bNicos$014374 801 0$aIT$bUNINA$gRICA$2UNIMARC 901 $aBK 912 $a990002567460403321 952 $aMXXII-A-44$b2684 a$fMAS 952 $aMXXII-A-43$b2684 b$fMAS 952 $aMXXII-A-45$b2618$fMAS 952 $a9-M-5$b17750$fMA1 952 $a02 52 C 15$b2199$fFINBN 959 $aFINBN 959 $aMA1 959 $aMAS 996 $aGraph theory$9345973 997 $aUNINA LEADER 08608nam 2200517 450 001 9910830545603321 005 20230603105046.0 010 $a1-119-87563-3 010 $a1-119-87561-7 035 $a(MiAaPQ)EBC7217795 035 $a(Au-PeEL)EBL7217795 035 $a(OCoLC)1373984990 035 $a(EXLCZ)9926291145200041 100 $a20230603d2023 uy 0 101 0 $aeng 135 $aurcnu|||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aModular multilevel converters $econtrol, fault detection, and protection /$fFujin Deng, Chengkai Liu and Zhe Chen 210 1$aHoboken, New Jersey :$cJohn Wiley & Sons, Inc.,$d[2023] 210 4$dİ2023 215 $a1 online resource (371 pages) 225 0 $aIEEE Press series on power and energy systems 311 08$aPrint version: Deng, Fujin Modular Multilevel Converters Newark : John Wiley & Sons, Incorporated,c2023 9781119875604 320 $aIncludes bibliographical references and index. 327 $aCover -- Title Page -- Copyright Page -- Contents -- About the Authors -- Preface -- Chapter 1 Modular Multilevel Converters -- 1.1 Introduction -- 1.2 MMC Configuration -- 1.2.1 Converter Configuration -- 1.2.2 Submodule Configuration -- 1.3 Operation Principles -- 1.3.1 Submodule Normal Operation -- 1.3.2 Submodule Blocking Operation -- 1.3.3 Converter Operation -- 1.4 Modulation Scheme -- 1.4.1 Phase-Disposition PWM -- 1.4.2 Phase-Shifted PWM -- 1.4.3 Nearest Level Modulation -- 1.5 Mathematical Model -- 1.5.1 Submodule Mathematical Model -- 1.5.2 Arm Mathematical Model -- 1.5.3 Three-Phase MMC Mathematical Model -- 1.6 Design Constraints -- 1.6.1 Power Device Design -- 1.6.2 Capacitor Design -- 1.6.3 Arm Inductor Design -- 1.7 Faults Overview of MMCs -- 1.7.1 Internal Faults of MMCs -- 1.7.2 External Faults of MMCs -- 1.8 Summary -- References -- Chapter 2 Control of MMCs -- 2.1 Introduction -- 2.2 Overall Control of MMCs -- 2.3 Output Control of MMCs -- 2.3.1 Current Control -- 2.3.2 Power and DC-Link Voltage Control -- 2.3.3 Grid Forming Control -- 2.4 Centralized Capacitor Voltage Balancing Control -- 2.4.1 On-State SMs Number Based VBC -- 2.4.2 Balancing Adjusting Number Based VBC -- 2.4.3 IPSC-PWM Harmonic Current Based VBC -- 2.4.4 SHE-PWM Pulse Energy Sorting Based VBC -- 2.4.5 PSC-PWM Pulse Energy Sorting Based VBC -- 2.5 Individual Capacitor Voltage Balancing Control -- 2.5.1 Average and Balancing Control Based VBC -- 2.5.2 Reference Modulation Index Based VBC -- 2.5.3 Reference Phase Angle Based VBC -- 2.6 Circulating Current Control -- 2.6.1 Proportional Integration Control -- 2.6.2 Multiple Proportional Resonant Control -- 2.6.3 Repetitive Control -- 2.7 Summary -- References -- Chapter 3 Fault Detection of MMCs under IGBT Faults -- 3.1 Introduction -- 3.2 IGBT Faults -- 3.2.1 IGBT Short-Circuit Fault. 327 $a3.2.2 IGBT Open-Circuit Fault -- 3.3 Protection and Detection Under IGBT Short-Circuit Faults -- 3.3.1 SM Under IGBT Short-Circuit Fault -- 3.3.2 Protection and Detection Under IGBT Short-Circuit Fault -- 3.4 MMC Features Under IGBT Open-Circuit Faults -- 3.4.1 Faulty SM Features Under T1 Open-Circuit Fault -- 3.4.2 Faulty SM Features Under T2 Open-Circuit Fault -- 3.5 Kalman Filter Based Fault Detection Under IGBT Open-Circuit Faults -- 3.5.1 Kalman Filter Algorithm -- 3.5.2 Circulating Current Estimation -- 3.5.3 Faulty Phase Detection -- 3.5.4 Capacitor Voltage -- 3.5.5 Faulty SM Detection -- 3.6 Integrator Based Fault Detection Under IGBT Open-Circuit Faults -- 3.7 STW Based Fault Detection Under IGBT Open-Circuit Faults -- 3.7.1 MMC Data -- 3.7.2 Sliding-Time Windows -- 3.7.3 Feature of STW -- 3.7.4 Features Relationships Between Neighboring STWs -- 3.7.5 Features Extraction Algorithm -- 3.7.6 Energy Entropy Matrix -- 3.7.7 2D-CNN -- 3.7.8 Fault Detection Method -- 3.7.9 Selection of Sliding Interval -- 3.7.10 Analysis of Fault Localization Time -- 3.8 IF Based Fault Detection Under IGBT Open-Circuit Faults -- 3.8.1 IT for MMCs -- 3.8.2 SM Depth in IT -- 3.8.3 IF for MMCs -- 3.8.4 SM Average Depth in IF -- 3.8.5 IF Output -- 3.8.6 Fault Detection -- 3.8.7 Selection of mp -- 3.8.8 Selection of k -- 3.9 Summary -- References -- Chapter 4 Condition Monitoring and Control of MMCs Under Capacitor Faults -- 4.1 Introduction -- 4.2 Capacitor Equivalent Circuit in MMCs -- 4.3 Capacitor Parameter Characteristics in MMCs -- 4.3.1 Capacitor Current Characteristics -- 4.3.2 Capacitor Impedance Characteristics -- 4.3.3 Capacitor Voltage Characteristics -- 4.4 Capacitor Aging -- 4.5 Capacitance Monitoring -- 4.5.1 Capacitor Voltage and Current Based Monitoring Strategy -- 4.5.2 Arm Average Capacitance Based Monitoring Method. 327 $a4.5.3 Reference SM based Monitoring Method -- 4.5.4 Sorting-Based Monitoring Strategy -- 4.5.5 Temperature Effect of Capacitance -- 4.6 ESR Monitoring -- 4.6.1 Direct ESR Monitoring Strategy -- 4.6.2 Sorting-Based ESR Monitoring Strategy -- 4.6.3 Temperature Effect of ESR -- 4.7 Capacitor Lifetime Monitoring -- 4.8 Arm Current Optimal Control Under Capacitor Aging -- 4.8.1 Equivalent Circuit of MMCs -- 4.8.2 Arm Current Characteristics -- 4.8.3 Arm Current Optimal Control -- 4.9 SM Power Losses Optimal Control Under Capacitor Aging -- 4.9.1 Equivalent SM Reference -- 4.9.2 SM Conduction Losses -- 4.9.3 SM Switching Losses -- 4.9.4 SM Power Losses Optimal Control -- 4.10 Summary -- References -- Chapter 5 Fault-Tolerant Control of MMCs Under SM Faults -- 5.1 Introduction -- 5.2 SM Protection Circuit -- 5.3 Redundant Submodules -- 5.4 Fault-Tolerant Scheme -- 5.4.1 Cold Reserve Mode -- 5.4.2 Spinning Reserve Mode-I -- 5.4.3 Spinning Reserve Mode-II -- 5.4.4 Spinning Reserve Mode-III -- 5.4.5 Comparison of Fault-Tolerant Schemes -- 5.5 Fundamental Circulating Current Elimination Based Tolerant Control -- 5.5.1 Equivalent Circuit of MMCs -- 5.5.2 Fundamental Circulating Current -- 5.5.3 Fundamental Circulating Current Elimination Control -- 5.5.4 Control Analysis -- 5.6 Summary -- References -- Chapter 6 Control of MMCs Under AC Grid Faults -- 6.1 Introduction -- 6.2 Mathematical Model of MMCs under AC Grid Faults -- 6.2.1 AC-Side Mathematical Model -- 6.2.2 Instantaneous Power Mathematical Model -- 6.3 AC-Side Current Control of MMCs under AC Grid Faults -- 6.3.1 Positive- and Negative-Sequence Current Control -- 6.3.2 Zero-Sequence Current Control -- 6.3.3 Proportional Resonant Based Current Control -- 6.4 Circulating Current Suppression Control of MMCs under AC Grid Faults -- 6.4.1 Circulating Current of MMCs Under AC Grid Faults. 327 $a6.4.2 Single-Phase Vector Based Control -- 6.4.3 0 Stationary Frame Based Control -- 6.4.4 Three-Phase Stationary Frame Based Control -- 6.5 Summary -- References -- Chapter 7 Protection Under DC Short-Circuit Fault in HVDC System -- 7.1 Introduction -- 7.2 MMC Under DC Short-Circuit Fault -- 7.2.1 System Configuration -- 7.2.2 AC Circuit Breaker -- 7.2.3 Protection Thyristor -- 7.2.4 Protection Operation -- 7.3 DC Circuit Breaker Based Protection -- 7.3.1 Mechanical Circuit Breaker -- 7.3.2 Semiconductor Circuit Breaker -- 7.3.3 Hybrid Circuit Breaker -- 7.3.4 Multiterminal Circuit Breaker -- 7.3.5 Superconducting Fault Current Limiter -- 7.3.6 SFCL-Based Circuit Breaker -- 7.4 Fault Blocking Converter Based Protection -- 7.4.1 FB SM and HB SM Based Hybrid MMC -- 7.4.2 Fault Blocking Control -- 7.4.3 FB SM Ratio -- 7.4.4 Alternative Fault Blocking SMs -- 7.5 Bypass Thyristor MMC Based Protection -- 7.5.1 Bypass Thyristor MMC Configuration -- 7.5.2 SM Control -- 7.5.3 Current Interruption Control -- 7.5.4 Protection Operation -- 7.6 CTB-HMMC Based Protection -- 7.6.1 CTB-HMMC Configuration -- 7.6.2 SM Operation Principle -- 7.6.3 Operation Principle for DC Fault Protection -- 7.6.4 DC-Side Current Interruption Operation -- 7.6.5 Capacitor Voltage Increment -- 7.6.6 AC-Side Current Interruption Operation -- 7.6.7 MMC Comparison -- 7.7 Summary -- References -- Index -- EULA. 410 0$aIEEE Press Series on Power and Energy Systems Series 606 $aElectric current converters 606 $aModularity (Engineering) 615 0$aElectric current converters. 615 0$aModularity (Engineering) 676 $a621.3815322 700 $aDeng$b Fujin$01634588 702 $aLiu$b Chengkai 702 $aChen$b Zhe 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910830545603321 996 $aModular multilevel converters$93974877 997 $aUNINA LEADER 01945nam 2200637Ia 450 001 9910969894403321 005 20250509225830.0 010 $a1-283-57203-6 010 $a9786613884480 010 $a0-8093-3109-8 035 $a(CKB)2670000000241279 035 $a(OCoLC)811410469 035 $a(CaPaEBR)ebrary10594428 035 $a(SSID)ssj0000711380 035 $a(PQKBManifestationID)11374719 035 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