LEADER 05417nam 2200649Ia 450 001 9910830394203321 005 20170810191447.0 010 $a1-281-84314-8 010 $a9786611843144 010 $a3-527-61774-4 010 $a3-527-61775-2 035 $a(CKB)1000000000377066 035 $a(EBL)481335 035 $a(OCoLC)289075526 035 $a(SSID)ssj0000120436 035 $a(PQKBManifestationID)11146453 035 $a(PQKBTitleCode)TC0000120436 035 $a(PQKBWorkID)10102320 035 $a(PQKB)11182201 035 $a(MiAaPQ)EBC481335 035 $a(PPN)153531282 035 $a(EXLCZ)991000000000377066 100 $a19960213d2004 uy 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aChemical mechanical planarization of microelectronic materials$b[electronic resource] /$fJoseph M. Steigerwald, Shyam P. Murarka, Ronald J. Gutmann 210 $aWeinheim $cWiley-VCH$d2004 215 $a1 online resource (339 p.) 300 $aDescription based upon print version of record. 311 $a0-471-13827-4 320 $aIncludes bibliographical references and index. 327 $aChemical Mechanical Planarization of Microelectronic Materials; CONTENTS; Preface; 1 Chemical Mechanical Planarization - An Introduction; 1.1 Introduction; 1.2 Applications; 1.3 The CMP Process; 1.4 CMP Tools; 1.5 Process Integration; 1.6 Conclusion and Book Outline; References; 2 Historical Motivations for CMP; 2.1 Advanced Metallization Schemes; 2.1.1 Interconnect Delay Impact on Performance; 2.1.2 Methods of Reducing Interconnect Delay; 2.1.3 Planarity Requirements for Multilevel Metallization; 2.2 Planarization Schemes; 2.2.1 Smoothing and Local Planarization; 2.2.2 Global Planarization 327 $a2.3 CMP Planarization2.3.1 Advantages of CMP; 2.3.2 Disadvantages of CMP; 2.3.3 The Challenge of CMP; References; 3 CMP Variables and Manipulations; 3.1 Output Variables; 3.2 Input Variables; References; 4 Mechanical and Electrochemical Concepts for CMP; 4.1 Preston Equation; 4.2 Fluid Layer Interactions; 4.3 Boundary Layer Interactions; 4.3.1 Fluid Boundary Layer; 4.3.2 Double Layer; 4.3.3 Metal Surface Films; 4.3.4 Mechanical Abrasion; 4.4 Abrasion Modes; 4.4.1 Polishing vs. Grinding; 4.4.2 Hertzian Indentation vs. Fluid-Based Wear; 4.5 The Polishing Pad; 4.5.1 Pad Materials and Properties 327 $a4.5.2 Pad Conditioning4.6 Electrochemical Phenomena; 4.6.1 Reduction-Oxidation Reactions; 4.6.2 Pourbaix Diagrams; 4.6.3 Mixed Potential Theory; 4.6.4 Example: Copper CMP in NH3-Based Slurries; 4.6.5 Example: Copper-Titanium Interaction; 4.7 Role of Chemistry in CMP; 4.8 Abrasives; References; 5 Oxide CMP Processes - Mechanisms and Models; 5.1 The Role of Chemistry in Oxide Polishing; 5.1.1 Glass Polishing Mechanisms; 5.1.2 The Role of Water in Oxide Polishing; 5.1.3 Chemical Interactions Between Abrasive and Oxide Surface; 5.2 Oxide CMP in Practice; 5.2.1 Polish Rate Results 327 $a5.2.2 Planarization Results5.2.3 CMP in Manufacturing; 5.2.4 Yield Issues; 5.3 Summary; References; 6 Tungsten and CMP Processes; 6.1 Inlaid Metal Patterning; 6.1.1 RIE Etch Back; 6.1.2 Metal CMP; 6.2 Tungsten CMP; 6.2.1 Surface Passivation Model for Tungsten CMP; 6.2.2 Tungsten CMP Processes; 6.3 Summary; References; 7 Copper CMP; 7.1 Proposed Model for Copper CMP; 7.2 Surface Layer Formation - Planarization; 7.2.1 Formation of Native Surface Films; 7.2.2 Formation of Nonnative Cu-BTA Surface Film; 7.3 Material Dissolution; 7.3.1 Removal of Abraded Material 327 $a7.3.2 Increasing Solubility with Complexing Agent7.3.3 Increasing Dissolution Rate with Oxidizing Agents; 7.3.4 Chemical Aspect of the Copper CMP Model; 7.4 Preston Equation; 7.4.1 Preston Coefficient; 7.4.2 Polish Rates; 7.4.3 Comparison of Kp Values; 7.5 Polish-Induced Stress; 7.6 Pattern Geometry Effects; 7.6.1 Dishing and Erosion in Cu/SiO2 System; 7.6.2 Optimization of Process to Minimize Dishing and Erosion; 7.6.3 Summary; References; 8 CMP of Other Materials and New CMP Applications; 8.1 The Front-End Applications in Silicon IC Fabrication 327 $a8.1.1 Polysilicon CMP for Deep Trench Capacitor Fabrication 330 $aChemical Mechanical Planarization (CMP) plays an important role in today's microelectronics industry. With its ability to achieve global planarization, its universality (material insensitivity), its applicability to multimaterial surfaces, and its relative cost-effectiveness, CMP is the ideal planarizing medium for the interlayered dielectrics and metal films used in silicon integrated circuit fabrication. But although the past decade has seen unprecedented research and development into CMP, there has been no single-source reference to this rapidly emerging technology-until now.Chemica 606 $aMicroelectronics$xMaterials 606 $aGrinding and polishing 615 0$aMicroelectronics$xMaterials. 615 0$aGrinding and polishing. 676 $a621.3815 676 $a621.38152 700 $aSteigerwald$b Joseph M$01680970 701 $aMurarka$b S. P$0463885 701 $aGutmann$b Ronald J$01680971 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910830394203321 996 $aChemical mechanical planarization of microelectronic materials$94050047 997 $aUNINA