LEADER 05713nam 2200817 a 450 001 9910828870803321 005 20240313140621.0 010 $a9781118600696 010 $a111860069X 010 $a9781299187504 010 $a1299187501 010 $a9781118600610 010 $a1118600614 010 $a9781118600801 010 $a1118600800 035 $a(CKB)2670000000327697 035 $a(EBL)1120753 035 $a(OCoLC)827207553 035 $a(SSID)ssj0000831589 035 $a(PQKBManifestationID)11421088 035 $a(PQKBTitleCode)TC0000831589 035 $a(PQKBWorkID)10880555 035 $a(PQKB)11255224 035 $a(MiAaPQ)EBC1120753 035 $a(Au-PeEL)EBL1120753 035 $a(CaPaEBR)ebr10657623 035 $a(CaONFJC)MIL450000 035 $a(OCoLC)500823375 035 $a(FINmELB)ELB178716 035 $a(Perlego)1007058 035 $a(EXLCZ)992670000000327697 100 $a20100505d2010 uy 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aSafety of computer architectures /$fedited by Jean-Louis Boulanger 205 $a1st ed. 210 $aLondon $cISTE ;$aHoboken, N.J. $cb Wiley$d2010 215 $a1 online resource (506 p.) 225 1 $aISTE 300 $aDescription based upon print version of record. 311 08$a9781848211971 311 08$a184821197X 320 $aIncludes bibliographical references and index. 327 $aCover; Safety of Computer Architectures; Title Page; Copyright Page; Table of Contents; Introduction; Chapter 1. Principles; 1.1. Introduction; 1.2. Presentation of the basic concepts: faults, errors and failures; 1.2.1. Obstruction to functional safety; 1.2.2. Safety demonstration studies; 1.2.3. Assessment; 1.3. Safe and/or available architecture; 1.4. Resetting a processing unit; 1.5. Overview of safety techniques; 1.5.1. Error detection; 1.5.2. Diversity; 1.5.3. Redundancy; 1.5.4. Error recovery and retrieval; 1.5.5. Partitioning; 1.6. Conclusion; 1.7. Bibliography 327 $aChapter 2. Railway Safety Architecture2.1. Introduction; 2.2. Coded secure processor; 2.2.1. Basic principle; 2.2.2. Encoding; 2.2.3. Hardware architecture; 2.2.4. Assessment; 2.3. Other applications; 2.3.1. TVM 430; 2.3.2. SAET-METEOR; 2.4. Regulatory and normative context; 2.4.1. Introduction; 2.4.2. CENELEC and IEC history; 2.4.3. Commissioning evaluation, certification, and authorization; 2.5. Conclusion; 2.6. Bibliography; Chapter 3. From the Coded Uniprocessor to 2oo3; 3.1. Introduction; 3.2. From the uniprocessor to the dual processor with voter 327 $a3.2.1. North LGV requirements and the Channel Tunnel3.2.2. The principles of the dual processor with voter by coded uniprocessor; 3.2.3. Architecture characteristics; 3.2.4. Requirements for the Mediterranean LGV; 3.3. CSD: available safety computer; 3.3.1. Background; 3.3.2. Functional architecture; 3.3.3. Software architecture; 3.3.4. Synchronization signals; 3.3.5. The CSD mail system; 3.4. DIVA evolutions; 3.4.1. ERTMS equipment requirements; 3.4.2. Functional evolution; 3.4.3. Technological evolution; 3.5. New needs and possible solutions; 3.5.1. Management of the partitions 327 $a3.5.2. Multicycle services3.6. Conclusion; 3.7. Assessment of installations; 3.8. Bibliography; Chapter 4. Designing a Computerized Interlocking Module: a Key Component of Computer-Based Signal Boxes Designed by the SNCF; 4.1. Introduction; 4.2. Issues; 4.2.1. Persistent bias; 4.2.2. Challenges for tomorrow; 4.2.3. Probability and computer safety; 4.2.4. Maintainability and modifiability; 4.2.5. Specific problems of critical systems; 4.2.6. Towards a targeted architecture for safety automatons; 4.3. Railway safety: fundamental notions; 4.3.1. Safety and availability 327 $a4.3.2. Intrinsic safety and closed railway world4.3.3. Processing safety; 4.3.4. Provability of the safety of computerized equipment; 4.3.5. The signal box; 4.4. Development of the computerized interlocking module; 4.4.1. Development methodology of safety systems; 4.4.2. Technical architecture of the system; 4.4.3. MEI safety; 4.4.4. Modeling the PETRI network type; 4.5. Conclusion; 4.6. Bibliography; Chapter 5. Command Control of Railway Signaling Safety: Safety at Lower Cost; 5.1. Introduction; 5.2. A safety coffee machine; 5.3. History of the PIPC; 5.4. The concept basis 327 $a5.5. Postulates for safety requirements 330 $aIt is currently quite easy for students or designers/engineers to find very general books on the various aspects of safety, reliability and dependability of computer system architectures, and partial treatments of the elements that comprise an effective system architecture. It is not so easy to find a single source reference for all these aspects of system design. However, the purpose of this book is to present, in a single volume, a full description of all the constraints (including legal contexts around performance, reliability norms, etc.) and examples of architectures from various fields o 410 0$aISTE 606 $aComputer architecture 606 $aComputer systems$xReliability 606 $aComputer security 606 $aAvionics$xSafety measures 615 0$aComputer architecture. 615 0$aComputer systems$xReliability. 615 0$aComputer security. 615 0$aAvionics$xSafety measures. 676 $a005.8 701 $aBoulanger$b Jean-Louis$0847395 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910828870803321 996 $aSafety of computer architectures$94015873 997 $aUNINA