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100   $a20090113d2009      uy         0
101 0 $aeng
135   $aur|n|---|||||
181   $ctxt
182   $cc
183   $acr
200 00$aVLSI and computer architecture /$fKenzo Watanabe, editor
205   $a1st ed.
210   $aNew York $cNova Science Publisher$dc2009
215   $a1 online resource (253 p.)
300   $aDescription based upon print version of record.
311   $a1-60692-075-8 
320   $aIncludes bibliographical references and index.
327   $a""VLSI AND COMPUTERARCHITECTURE""; ""VLSI AND COMPUTER  ARCHITECTURE ""; ""CONTENTS""; ""PREFACE""; ""DESIGN CONSIDERATIONS AND ALGORITHMSFOR BROADBAND FIXED WIMAX SYSTEMS""; ""Abstract""; ""1. Introduction""; ""1.1. Introduction""; ""1.2. Orthogonal Frequency Division Multiplexing (OFDM)""; ""1.2.1. Non-iterative OFDM Scheme""; ""1.2.2. Iterative OFDM Scheme""; ""1.3. SC-FDE""; ""1.4. Quantitative Results""; ""2. Time-Domain Solutions""; ""2.1. Time-Domain Turbo Equalization for SISO System""; ""2.1.1. Initial stage""; ""2.1.2. Subsequent Stages""; ""2.1.3. Complexity Comparison""
327   $a""2.2. Time-Domain Turbo Equalization for MIMO Systems""""2.2.1. Initial Stage""; ""2.2.2. Subsequent Stages""; ""2.3. Performance Comparison""; ""3. Conclusions""; ""References""; ""VLSI INTERCONNECTS AND THEIR DELAYPERFORMANCE""; ""Abstract""; ""1. Introduction""; ""2. Modeling Interconnect as RC & RLC Circuits""; ""2.1. Lumped and Distributed Models""; ""3. Extraction of Interconnect Parasitics""; ""4. Propagation Delay through Driver Interconnect Load Model""; ""4.1. Driver Delay Models""; ""4.2. Interconnect Delay Models""; ""4.3. Composite Driver-Interconnect-Load Model-A Case Study""
327   $a""4.3.1. Effect of Short-Circuit Current on Propagation Delay""""4.3.2. Fifty Percent Propagation Delay Evaluation""; ""5. Delay Minimization Techniques""; ""6. Conclusion""; ""References""; ""DEVELOPMENT, VALIDATION AND EVALUATION OF ASPACE QUALIFIED LONG-LIFE FLIGHTCOMPUTER SERVER""; ""Abstract""; ""1. Introduction""; ""2. Single Board Microcomputers""; ""3. Fault Protections For Single Board Microcomputers""; ""3.1 Protections Against Seu Events""; ""3.2 Latch-Up Protection""; ""3.3 Other Protections""; ""4. Sqllcs Integration And Validation""
327   $a""4.1 Hardware And Software Tools Developed For Sqllcs Validation""""4.2 Satellite Simulator""; ""4.3 SOFDEVO Software""; ""4.4 Earth Station Software""; ""5. Reliability Study Of Sqllcs Hardware""; ""5.1 SQLLCS Maintenance""; ""5.2 Reliability of an SQLLCS Assembled with Three SBMs""; ""5.3 Reliability for a Single SBM""; ""5.4 Reliability for a SQLLCS Assembled with Two SBMs""; ""6. Conclusion""; ""Acknowledgments""; ""References""; ""NUMERICAL SIMULATION OF QUANTUMWAVEGUIDES""; ""Abstract""; ""1. Introduction""
327   $a""2. Transparent Boundary Conditions for the Two DimensionalSchrA??odinger Equation""""3. Discrete Transparent Boundary Conditions for the Two DimensionalSchrA??odinger Equation""; ""3.1. The Difference Equations""; ""3.2. Derivation of DTBCs for the Two Dimensional SchrA??odinger Equation""; ""3.3. Approximation of the DTBCs by Sums of Exponentials""; ""3.4. Fast Evaluation of the Discrete Convolution""; ""3.5. Implementation of the DTBCs""; ""4. Numerical Results""; ""4.1. Travelling GaussianWave Functions""; ""4.2. QuantumWaveguide Simulation""; ""Conclusion""; ""Acknowledgements""
327   $a""References""
606   $aIntegrated circuits$xVery large scale integration$xDesign and construction
606   $aComputer architecture
606   $aWireless communication systems$xEquipment and supplies$xDesign and construction
606   $aMicrocontrollers$xDesign and construction
615  0$aIntegrated circuits$xVery large scale integration$xDesign and construction.
615  0$aComputer architecture.
615  0$aWireless communication systems$xEquipment and supplies$xDesign and construction.
615  0$aMicrocontrollers$xDesign and construction.
676   $a621.39/5
701   $aWatanabe$b Kenzo$01667560
801  0$bMiAaPQ
801  1$bMiAaPQ
801  2$bMiAaPQ
906   $aBOOK
912   $a9910828333803321
996   $aVLSI and computer architecture$94027464
997   $aUNINA