LEADER 02880nam 2200505 450 001 9910808615003321 005 20230808205231.0 010 $a1-119-31864-5 010 $a1-119-31863-7 010 $a1-119-31862-9 035 $a(CKB)4330000000010227 035 $a(EBL)4560567 035 $a(MiAaPQ)EBC4560567 035 $a(Au-PeEL)EBL4560567 035 $a(CaPaEBR)ebr11225539 035 $a(CaONFJC)MIL933709 035 $a(OCoLC)952248211 035 $a(EXLCZ)994330000000010227 100 $a20160714h20162016 uy 0 101 0 $aeng 135 $aur|n|---||||| 181 $2rdacontent 182 $2rdamedia 183 $2rdacarrier 200 10$aDigital electronics$h1$iCombinational logic circuits /$fTertulien Ndjountche 210 1$aLondon, England ;$aHoboken, New Jersey :$cISTE :$cWiley,$d2016. 210 4$dİ2016 215 $a1 online resource (288 p.) 300 $aDescription based upon print version of record. 311 $a1-84821-984-9 320 $aIncludes bibliographical references and index. 327 $aIntro; Table of Contents; Title; Copyright; Preface; 1 Number Systems; 2 Logic Gates; 3 Function Blocks of Combinational Logic; 4 Systematic Methods for the Simplification of Logic Functions; Bibliography; Index; End User License Agreement; 1. Summary; 2. The reader; 1.1. Introduction; 1.2. Decimal numbers; 1.3. Binary numbers; 1.4. Octal numbers; 1.5. Hexadecimal numeration; 1.6. Representation in a radix B; 1.7. Binary-coded decimal numbers; 1.8. Representations of signed integers; 1.9. Representation of the fractional part of a number; 1.10. Arithmetic operations on binary numbers 327 $a1.11. Representation of real numbers1.12. Data representation; 1.13. Codes to protect against errors; 1.14. Exercises; 1.15. Solutions; 2.1. Introduction; 2.2. Logic gates; 2.3. Three-state buffer; 2.4. Logic function; 2.5. The correspondence between a truth table and a logic function; 2.6. Boolean algebra; 2.7. Multi-level logic circuit implementation; 2.8. Practical considerations; 2.9. Demonstration of some Boolean algebra identities; 2.10. Exercises; 2.11. Solutions; 3.1. Introduction; 3.2. Multiplexer; 3.3. Demultiplexer and decoder 327 $a3.4. Implementation of logic functions using multiplexers or decoders3.5. Encoders; 3.6. Transcoders; 3.7. Parity check generator; 3.8. Barrel shifter; 3.9. Exercises; 3.10. Solutions; 4.1. Introduction; 4.2. Definitions and reminders; 4.3. Karnaugh maps; 4.4. Systematic methods for simplification; 4.5. Exercises; 4.6. Solutions 606 $aLogic circuits 615 0$aLogic circuits. 676 $a621.38195835 700 $aNdjountche$b Tertulien$0864770 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910808615003321 996 $aDigital electronics$94030642 997 $aUNINA