LEADER 05543nam 22006494a 450 001 9910784656203321 005 20230120004633.0 010 $a1-281-05353-8 010 $a9786611053536 010 $a0-08-048883-8 035 $a(CKB)1000000000364042 035 $a(EBL)294121 035 $a(OCoLC)476056780 035 $a(SSID)ssj0000074770 035 $a(PQKBManifestationID)11110244 035 $a(PQKBTitleCode)TC0000074770 035 $a(PQKBWorkID)10123035 035 $a(PQKB)10510834 035 $a(Au-PeEL)EBL294121 035 $a(CaPaEBR)ebr10186468 035 $a(CaONFJC)MIL105353 035 $a(MiAaPQ)EBC294121 035 $a(EXLCZ)991000000000364042 100 $a20061229d2007 uy 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aESL design and verification$b[electronic resource] $ea prescription for electronic system-level methodology /$fBrian Bailey, Grant Martin, Andrew Piziali 210 $aAmsterdam ;$aBoston $cMorgan Kaufmann$dc2007 215 $a1 online resource (489 p.) 225 1 $aThe Morgan Kaufmann series in systems on silicon 300 $aDescription based upon print version of record. 311 $a0-12-373551-3 320 $aIncludes bibliographical references and index. 327 $aFront cover; ESL DESIGN AND VERIFICATION; Copyright page; Table of contents; FOREWORD: ESL FROM THE TRENCHES; AUTHORS' ACKNOWLEDGMENTS; ABOUT THE AUTHORS; ABOUT THE CONTRIBUTORS; Chapter 1. WHAT IS ESL?; 1.1 SO, WHAT IS ESL?; 1.2 WHO SHOULD READ THIS BOOK; 1.3 STRUCTURE OF THE BOOK AND HOW TO READ IT; 1.4 CHAPTER LISTING; 1.5 THE PRESCRIPTION; References; Chapter 2. TAXONOMY AND DEFINITIONS FOR THE ELECTRONIC SYSTEM LEVEL; 2.1 TAXONOMY; 2.1.1 Introduction; 2.1.2 Model Taxonomy; 2.1.3 ESL Taxonomy; 2.2 DEFINITIONS; References; Chapter 3. EVOLUTION OF ESL DEVELOPMENT; 3.1 INTRODUCTION 327 $a3.2 MOTIVATION FOR ESL DESIGN3.3 TRADITIONAL SYSTEM DESIGN EFFECTIVENESS; 3.4 SYSTEM DESIGN WITH ESL METHODOLOGY; 3.5 BEHAVIORAL MODELING METHODOLOGY; 3.6 BEHAVIORAL MODELING ENVIRONMENTS; 3.7 HISTORICAL BARRIERS TO ADOPTION OF BEHAVIORAL MODELING; 3.8 AUTOMATED IMPLEMENTATION OF FIXED-FUNCTION HARDWARE; 3.9 AUTOMATED IMPLEMENTATION OF PROGRAMMABLE HARDWARE; 3.10 MAINSTREAMING ESL METHODOLOGY; 3.11 PROVOCATIVE THOUGHTS; 3.12 THE PRESCRIPTION; References; Chapter 4. WHAT ARE THE ENABLERS OF ESL?; 4.1 TOOL AND MODEL LANDSCAPE; 4.2 SYSTEM DESIGNER REQUIREMENTS; 4.3 SOFTWARE TEAM REQUIREMENTS 327 $a4.4 HARDWARE TEAM REQUIREMENTS4.5 WHO WILL SERVICE THESE DIVERSE REQUIREMENTS?; 4.6 FREE OR OPEN SOURCE SOFTWARE; 4.7 SUMMARY; 4.8 THE PRESCRIPTION; References; Chapter 5. ESL FLOW; 5.1 SPECIFICATIONS AND MODELING; 5.2 PRE-PARTITIONING ANALYSIS; 5.3 PARTITIONING; 5.4 POST-PARTITIONING ANALYSIS AND DEBUG; 5.5 POST-PARTITIONING VERIFICATION; 5.6 HARDWARE IMPLEMENTATION; 5.7 SOFTWARE IMPLEMENTATION; 5.8 USE OF ESL FOR IMPLEMENTATION VERIFICATION; 5.9 PROVOCATIVE THOUGHTS; 5.10 SUMMARY; 5.11 THE PRESCRIPTION; References; Chapter 6. SPECIFICATIONS AND MODELING; 6.1 THE PROBLEM OF SPECIFICATION 327 $a6.2 REQUIREMENTS MANAGEMENT AND PAPER SPECIFICATIONS6.3 ESL DOMAINS; 6.4 EXECUTABLE SPECIFICATIONS; 6.5 SOME ESL LANGUAGES FOR SPECIFICATION; 6.6 PROVOCATIVE THOUGHTS: MODEL-BASED DEVELOPMENT; 6.7 SUMMARY; 6.8 THE PRESCRIPTION; References; Chapter 7. PRE-PARTITIONING ANALYSIS; 7.1 STATIC ANALYSIS OF SYSTEM SPECIFICATIONS; 7.2 THE ROLE OF PLATFORM-BASED ESL DESIGN IN PRE-PARTITIONING ANALYSIS; 7.3 DYNAMIC ANALYSIS; 7.4 ALGORITHMIC ANALYSIS; 7.5 ANALYSIS SCENARIOS AND MODELING; 7.6 DOWNSTREAM USE OF ANALYSIS RESULTS; 7.7 CASE STUDY: JPEG ENCODING; 7.8 SUMMARY AND PROVOCATIVE THOUGHTS 327 $a7.9 THE PRESCRIPTIONReferences; Chapter 8. PARTITIONING; 8.1 INTRODUCTION; 8.2 FUNCTIONAL DECOMPOSITION; 8.3 ARCHITECTURE DESCRIPTION; 8.4 PARTITIONING; 8.5 THE HARDWARE PARTITION; 8.6 THE SOFTWARE PARTITION; 8.7 RECONFIGURABLE COMPUTING; 8.8 COMMUNICATION IMPLEMENTATION; 8.9 PROVOCATIVE THOUGHTS; 8.10 SUMMARY; 8.11 THE PRESCRIPTION; References; Chapter 9. POST-PARTITIONING ANALYSIS AND DEBUG; 9.1 ROLES AND RESPONSIBILITIES; 9.2 HARDWARE AND SOFTWARE MODELING AND CO-MODELING; 9.3 PARTITIONED SYSTEMS AND RE-PARTITIONING; 9.4 PRE-PARTITIONED MODEL COMPONENTS; 9.5 ABSTRACTION LEVELS 327 $a9.6 COMMUNICATION SPECIFICATION 330 $aVisit the authors' companion site! http://www.electronicsystemlevel.com/ - Includes interactive forum with the authors!Electronic System Level (ESL) design has mainstreamed - it is now an established approach at most of the world's leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with 'no links to implementation', ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation 410 0$aMorgan Kaufmann series in systems on silicon. 606 $aSystems on a chip$xDesign and construction 615 0$aSystems on a chip$xDesign and construction. 676 $a621.3815 700 $aBailey$b Brian$f1959-$01497170 701 $aMartin$b Grant$g(Grant Edmund)$01497171 701 $aPiziali$b Andrew$01497172 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910784656203321 996 $aESL design and verification$93722221 997 $aUNINA