LEADER 01011nam0-22002771i-450 001 990005326260403321 005 20230407093313.0 035 $a000532626 035 $aFED01000532626 035 $a(Aleph)000532626FED01 035 $a000532626 100 $a19990604d1849----km-y0itay50------ba 101 0 $ager 105 $af-------00--- 200 1 $aVon den Namen der Vasenbilbner in Beziehung zu ihren bildlichen Darstellungen$fvon Theodor Panofka 210 $aBerlin$cGedr. in der Druckerei der Königl. Akademie der Wissenschaften$d1849 215 $a25 p., 9 tav. di cui 2 rip.$d25 cm 300 $aAus den Abhandlungen der Königl. Akademie der Wissenschaften 1948 S. 153-241 700 1$aPanofka,$bTheodor$f<1800-1858>$0207321 801 0$aIT$bUNINA$gRICA$2UNIMARC 901 $aLG 912 $a990005326260403321 952 $aOPUSC. 18 (29)$bARCH. 12127$fFLFBC 959 $aFLFBC 996 $aVon den Namen der Vasenbilbner in Beziehung zu ihren bildlichen Darstellungen$9597316 997 $aUNINA LEADER 03068nam 22005775 450 001 9910760267403321 005 20250808085314.0 010 $a3-031-38960-3 024 7 $a10.1007/978-3-031-38960-3 035 $a(CKB)28305446100041 035 $a(MiAaPQ)EBC30755817 035 $a(Au-PeEL)EBL30755817 035 $a(DE-He213)978-3-031-38960-3 035 $a(PPN)272741078 035 $a(EXLCZ)9928305446100041 100 $a20230926d2024 u| 0 101 0 $aeng 135 $aurcnu|||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aQuality-of-Service Aware Design and Management of Embedded Mixed-Criticality Systems /$fby Behnaz Ranjbar, Alireza Ejlali, Akash Kumar 205 $a1st ed. 2024. 210 1$aCham :$cSpringer Nature Switzerland :$cImprint: Springer,$d2024. 215 $a1 online resource (205 pages) 311 08$a9783031389597 327 $aIntroduction -- Preliminaries and Literature Reviews -- Bounding Time in Mixed-Criticality Systems -- Safety- and Task-Drop-Aware Mixed-Criticality Task Scheduling -- Learning-Based Drop-Aware Mixed-Criticality Task Scheduling -- Fault-Tolerance and Power-Aware Multi-Core Mixed-Criticality System Design -- QoS- and Power-Aware Run-Time Scheduler for Multi-Core Mixed-Criticality Systems -- Conclusion. 330 $aThis book addresses the challenges associated with efficient Mixed-Criticality (MC) system design. We focus on application analysis through execution time analysis and task scheduling analysis in order to execute more low-criticality tasks in the system, i.e., improving the Quality-of-Service (QoS), while guaranteeing the correct execution of high-criticality tasks. Further, this book addresses the challenge of enhancing QoS using parallelism in multi-processor hardware platforms. Provides an overview of the state-of-the-art in Mixed-Criticality research, related to Quality-of-Service improvement; Describes a novel theoretical approach to obtaining Worst-Case Execution Times (WCETs); Utilizes machine learning models and objective optimization techniques to improve the resource utilization and QoS. . 606 $aElectronic circuits 606 $aEmbedded computer systems 606 $aElectronic circuit design 606 $aElectronic Circuits and Systems 606 $aEmbedded Systems 606 $aElectronics Design and Verification 615 0$aElectronic circuits. 615 0$aEmbedded computer systems. 615 0$aElectronic circuit design. 615 14$aElectronic Circuits and Systems. 615 24$aEmbedded Systems. 615 24$aElectronics Design and Verification. 676 $a006.22 700 $aRanjbar$b Behnaz$01438282 701 $aEjlali$b Alireza$01438283 701 $aKumar$b Akash$01438284 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910760267403321 996 $aQuality-of-Service Aware Design and Management of Embedded Mixed-Criticality Systems$93599582 997 $aUNINA