LEADER 00914nam0-2200301 --450 001 9910623697503321 005 20221116123940.0 010 $a88-87583-23-4 100 $a20221116d2003----kmuy0itay5050 ba 101 0 $aita 102 $aIT 105 $a 001yy 200 1 $aAutobiografia mai scritta$ericordi (1853-1932)$fErrico Malatesta$ga cura di Piero Brunello e Pietro Di Paola 210 $aSanta Maria Capua Vetere$cSpartaco$d2003 215 $a268 p.$d17 cm 225 1 $a<>risveglio$v3 610 0 $aMalatesta, Errico$aAutobiografia 676 $a335.83092$v21 700 1$aMalatesta,$bErrico$0174484 702 1$aBrunello,$bPiero 702 1$aDi Paola,$bPietro 801 0$aIT$bUNINA$gREICAT$2UNIMARC 901 $aBK 912 $a9910623697503321 952 $aFONDO ROSSI 1121$bROSSI 1161$fFARBC 959 $aFARBC 996 $aAutobiografia mai scritta$9231261 997 $aUNINA LEADER 03060nam 22006375 450 001 9910739463803321 005 20230814180157.0 010 $a9783031367939 010 $a3031367936 024 7 $a10.1007/978-3-031-36793-9 035 $a(MiAaPQ)EBC30697485 035 $a(Au-PeEL)EBL30697485 035 $a(DE-He213)978-3-031-36793-9 035 $a(PPN)27227447X 035 $a(CKB)27982381300041 035 $a(OCoLC)1395079454 035 $a(EXLCZ)9927982381300041 100 $a20230814d2023 u| 0 101 0 $aeng 135 $aurcnu|||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aDeep Reinforcement Learning Processor Design for Mobile Applications /$fby Juhyoung Lee, Hoi-Jun Yoo 205 $a1st ed. 2023. 210 1$aCham :$cSpringer Nature Switzerland :$cImprint: Springer,$d2023. 215 $a1 online resource (105 pages) 311 08$a9783031367922 311 08$a3031367928 327 $aIntroduction -- Background of Deep Reinforcement Learning -- Group-Sparse Training Algorithm for Accelerating Deep Reinforcement Learning -- An Energy-Efficient Deep Reinforcement Learning Processor Design -- Low-power Autonomous Adaptation System with Deep Reinforcement Learning -- Low-power Autonomous Adaptation System with Deep Reinforcement Learning -- Exponent-Computing-in-Memory for DNN Training Processor with Energy-Efficient Heterogeneous Floating-point Computing Architecture. 330 $aThis book discusses the acceleration of deep reinforcement learning (DRL), which may be the next step in the burst success of artificial intelligence (AI). The authors address acceleration systems which enable DRL on area-limited & battery-limited mobile devices. Methods are described that enable DRL optimization at the algorithm-, architecture-, and circuit-levels of abstraction. Enables deep reinforcement learning (DRL) optimization at algorithm-, architecture-, and circuit-levels of abstraction; Includes methodologies that can reduce the high cost of DRL; Uses analysis of computational workload characteristics of DRL in the context of acceleration. 606 $aElectronic circuits 606 $aEmbedded computer systems 606 $aMicroprocessors 606 $aComputer architecture 606 $aElectronic Circuits and Systems 606 $aEmbedded Systems 606 $aProcessor Architectures 615 0$aElectronic circuits. 615 0$aEmbedded computer systems. 615 0$aMicroprocessors. 615 0$aComputer architecture. 615 14$aElectronic Circuits and Systems. 615 24$aEmbedded Systems. 615 24$aProcessor Architectures. 676 $a621.38456 676 $a621.38456 700 $aLee$b Juhyoung$01424369 701 $aYoo$b Hoi-Jun$01380381 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910739463803321 996 $aDeep Reinforcement Learning Processor Design for Mobile Applications$93553514 997 $aUNINA