LEADER 00708nam0-22002651i-450- 001 990000881010403321 005 20131105132922.0 035 $a000088101 035 $aFED01000088101 035 $a(Aleph)000088101FED01 035 $a000088101 100 $a20020821d--------km-y0itay50------ba 101 0 $aeng 105 $ay-------001yy 200 1 $aApplied Stress Analysis 210 $aEnglewood$ccliffs prentice Hall ing.$d1967 610 0 $aSperimentazione 700 1$aDurelli,$bA. J.$02540 801 0$aIT$bUNINA$gRICA$2UNIMARC 901 $aBK 912 $a990000881010403321 952 $a03 SPER.0,13$b1917$fIINTC 959 $aIINTC 996 $aApplied Stress Analysis$9356346 997 $aUNINA LEADER 00947nam0-2200313 --450 001 9910673390603321 005 20230323184655.0 010 $a88-11-73859-8 100 $a20230323d1996----kmuy0itay5050 ba 101 0 $aita 102 $aIT 105 $a 001yy 200 1 $a<>modello americano$eegemonia e consenso nell'era della globalizzazione$fMario Calvo-Platero, Mauro Calamandrei 210 $a[Milano]$cGarzanti$d1996 215 $a343 p.$d21 cm 225 1 $aMemorie, documenti, biografie 610 0 $aEconomia mondiale 610 0 $aStati Uniti d'America$aPolitica$a1990-1996 676 $a973.928$v19 676 $a320.97309049$v20 700 1$aPlatero,$bMario$0267673 701 1$aCalamandrei,$bMauro$0174362 801 0$aIT$bUNINA$gREICAT$2UNIMARC 901 $aBK 912 $a9910673390603321 952 $aFL EUR 45$bFL-261$fDECBC 959 $aDECBC 996 $aModello americano$91254418 997 $aUNINA LEADER 03302nam 22005295 450 001 9910337645003321 005 20251116212924.0 010 $a3-030-03238-8 024 7 $a10.1007/978-3-030-03238-8 035 $a(CKB)4100000007223587 035 $a(MiAaPQ)EBC5620202 035 $a(DE-He213)978-3-030-03238-8 035 $a(PPN)232967040 035 $a(EXLCZ)994100000007223587 100 $a20181214d2019 u| 0 101 0 $aeng 135 $aurcnu|||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aLearning from VLSI Design Experience /$fby Weng Fook Lee 205 $a1st ed. 2019. 210 1$aCham :$cSpringer International Publishing :$cImprint: Springer,$d2019. 215 $a1 online resource (xxix, 214 pages) 311 08$a3-030-03237-X 327 $aChapter 1. Introduction -- Chapter 2. Design Methodology and Flow -- Chapter 3. Multiple Clock Design -- Chapter 4. Latch Inference -- Chapter 5. Design for Test -- Chapter 6. Signed Verilog -- Chapter 7. State Machine -- Chapter 8. RTL Coding Guideline -- Chapter 9. Code Coverage. . 330 $aThis book shares with readers practical design knowledge gained from the author?s 24 years of IC design experience. The author addresses issues and challenges faced commonly by IC designers, along with solutions and workarounds. Guidelines are described for tackling issues such as clock domain crossing, using lockup latch to cross clock domains during scan shift, implementation of scan chains across power domain, optimization methods to improve timing, how standard cell libraries can aid in synthesis optimization, BKM (best known method) for RTL coding, test compression, memory BIST, usage of signed Verilog for design requiring +ve and -ve calculations, state machine, code coverage and much more. Numerous figures and examples are provided to aid the reader in understanding the issues and their workarounds. Addresses practical design issues and their workarounds; Discusses issues such as CDC, crossing clock domain in shift, scan chains across power domain, timing optimization, standard cell library influence on synthesis, DFT, code coverage, state machine; Provides readers with an RTL coding guideline, based on real experience. 606 $aElectronic circuits 606 $aMicroprocessors 606 $aElectronics 606 $aMicroelectronics 606 $aCircuits and Systems$3https://scigraph.springernature.com/ontologies/product-market-codes/T24068 606 $aProcessor Architectures$3https://scigraph.springernature.com/ontologies/product-market-codes/I13014 606 $aElectronics and Microelectronics, Instrumentation$3https://scigraph.springernature.com/ontologies/product-market-codes/T24027 615 0$aElectronic circuits. 615 0$aMicroprocessors. 615 0$aElectronics. 615 0$aMicroelectronics. 615 14$aCircuits and Systems. 615 24$aProcessor Architectures. 615 24$aElectronics and Microelectronics, Instrumentation. 676 $a621.395 700 $aLee$b Weng Fook$4aut$4http://id.loc.gov/vocabulary/relators/aut$0867193 906 $aBOOK 912 $a9910337645003321 996 $aLearning from VLSI Design Experience$91935535 997 $aUNINA