LEADER 05738nam 22006255 450 001 9910637722203321 005 20251202133759.0 010 $a3-031-13074-X 024 7 $a10.1007/978-3-031-13074-8 035 $a(MiAaPQ)EBC7166117 035 $a(Au-PeEL)EBL7166117 035 $a(CKB)25913966600041 035 $a(PPN)267816502 035 $a(OCoLC)1357017373 035 $a(DE-He213)978-3-031-13074-8 035 $a(EXLCZ)9925913966600041 100 $a20221223d2022 u| 0 101 0 $aeng 135 $aurcnu|||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aMachine Learning Applications in Electronic Design Automation /$fedited by Haoxing Ren, Jiang Hu 205 $a1st ed. 2022. 210 1$aCham :$cSpringer International Publishing :$cImprint: Springer,$d2022. 215 $a1 online resource (585 pages) 225 1 $aMathematics and Statistics Series 311 08$aPrint version: Ren, Haoxing Machine Learning Applications in Electronic Design Automation Cham : Springer International Publishing AG,c2023 9783031130731 320 $aIncludes bibliographical references and index. 327 $aIntroduction -- Analysis of Digital Design: Routability Optimization for Industrial Designs at Sub-14nm Process Nodes Using Machine Learning -- RouteNet: Routability Prediction for Mixed-size Designs Using Convolutional Neural Network -- High Performance Graph Convolutional networks with Applications in Testability Analysis -- MAVIREC: ML-Aided Vectored IR-Drop Estimation and Classification -- GRANNITE: Graph Neural Network Inference for Transferable Power Estimation -- Machine Learning-Enabled High-Frequency Low-Power Digital Design Implementation at Advanced Process Nodes -- Optimization of Digital Design: Chip Placement with Deep Reinforcement learning -- DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement -- TreeNet: Deep Point Cloud Embedding for Routing Tree Construction -- Asynchronous Reinforcement Learning Framework for Net Order Exploration in Detailed Routing -- Standard Cell Routing with Reinforcement Learning and Genetic Algorithm in Advanced Technology Nodes -- PrefixRL: Optimization of Parallel Prefix Circuits using Deep Reinforcement Learning -- GAN-CTS: A Generative Adversarial Framework for Clock Tree Prediction and Optimization -- Analysis and Optimization of Analog Design: Machine Learning Techniques in Analog Layout Automation -- Layout Symmetry Annotation for Analog Circuits with Graph Neural Networks -- ParaGraph: Layout parasitics and device parameter prediction using graph neural network -- GCN-RL circuit designer: Transferable transistor sizing with graph neural networks and reinforcement learn -- Parasitic-Aware Analog Circuit Sizing with Graph Neural Networks and Bayesian Optimization -- Logic and Physical Verification: Deep Predictive Coverage Collection/ Dynamically Optimized Test Generation Using Machine Learning -- Novelty-Driven Verification: Using Machine Learning to Identify Novel Stimuli and Close Coverage -- Using Machine Learning Clustering To Find Large Coverage Holes -- GAN-OPC: Mask optimization with lithography-guided generative adversarial nets -- Layout hotspot detection with feature tensor generation and deep biased learning. 330 $aThis book serves as a single-source reference to key machine learning (ML) applications and methods in digital and analog design and verification. Experts from academia and industry cover a wide range of the latest research on ML applications in electronic design automation (EDA), including analysis and optimization of digital design, analysis and optimization of analog design, as well as functional verification, FPGA and system level designs, design for manufacturing (DFM), and design space exploration. The authors also cover key ML methods such as classical ML, deep learning models such as convolutional neural networks (CNNs), graph neural networks (GNNs), generative adversarial networks (GANs) and optimization methods such as reinforcement learning (RL) and Bayesian optimization (BO). All of these topics are valuable to chip designers and EDA developers and researchers working in digital and analog designs and verification. Serves as a single-source reference to key machine learning (ML) applications and methods in digital and analog design and verification; Covers classical ML methods, as well as deep learning models such as convolutional neural networks (CNNs), graph neural networks (GNNs), generative adversarial networks (GANs) and optimization methods such as reinforcement learning (RL) and Bayesian optimization (BO); Discusses machine learning ML?s applications in electronic design automation (EDA), especially in the design automation of VLSI integrated circuits. 410 0$aMathematics and Statistics Series 606 $aElectronic circuits 606 $aEmbedded computer systems 606 $aElectronic circuit design 606 $aElectronic Circuits and Systems 606 $aEmbedded Systems 606 $aElectronics Design and Verification 615 0$aElectronic circuits. 615 0$aEmbedded computer systems. 615 0$aElectronic circuit design. 615 14$aElectronic Circuits and Systems. 615 24$aEmbedded Systems. 615 24$aElectronics Design and Verification. 676 $a929.374 676 $a621.38150285631 702 $aRen$b Haoxing 702 $aHu$b Jiang 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910637722203321 996 $aMachine learning applications in electronic design automation$93362878 997 $aUNINA