LEADER 04957nam 22008775 450 001 9910484914503321 005 20230406040521.0 010 $a3-540-69338-6 024 7 $a10.1007/978-3-540-69338-3 035 $a(CKB)1000000000490640 035 $a(EBL)3061644 035 $a(SSID)ssj0000318106 035 $a(PQKBManifestationID)11245577 035 $a(PQKBTitleCode)TC0000318106 035 $a(PQKBWorkID)10312415 035 $a(PQKB)11489153 035 $a(DE-He213)978-3-540-69338-3 035 $a(MiAaPQ)EBC3061644 035 $a(MiAaPQ)EBC6283992 035 $a(PPN)123726565 035 $a(EXLCZ)991000000000490640 100 $a20100301d2007 u| 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aHigh Performance Embedded Architectures and Compilers$b[electronic resource] $eSecond International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007. Proceedings /$fedited by Koen De Bosschere, David Kaeli, Per Stenström, David Whalley, Theo Ungerer 205 $a1st ed. 2007. 210 1$aBerlin, Heidelberg :$cSpringer Berlin Heidelberg :$cImprint: Springer,$d2007. 215 $a1 online resource (297 p.) 225 1 $aTheoretical Computer Science and General Issues,$x2512-2029 ;$v4367 300 $aInternational conference proceedings. 311 $a3-540-69337-8 320 $aIncludes bibliographical references and index. 327 $aInvited Program -- Keynote: Insight, Not (Random) Numbers: An Embedded Perspective -- I Secure and Low-Power Embedded Memory Systems -- Compiler-Assisted Memory Encryption for Embedded Processors -- Leveraging High Performance Data Cache Techniques to Save Power in Embedded Systems -- Applying Decay to Reduce Dynamic Power in Set-Associative Caches -- II Architecture/Compiler Optimizations for Efficient Embedded Processing -- Virtual Registers: Reducing Register Pressure Without Enlarging the Register File -- Bounds Checking with Taint-Based Analysis -- Reducing Exit Stub Memory Consumption in Code Caches -- III Adaptive Microarchitectures -- Reducing Branch Misprediction Penalties Via Adaptive Pipeline Scaling -- Fetch Gating Control Through Speculative Instruction Window Weighting -- Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches -- Branch History Matching: Branch Predictor Warmup for Sampled Simulation -- Sunflower : Full-System, Embedded Microarchitecture Evaluation -- Efficient Program Power Behavior Characterization -- Generation of Efficient Embedded Applications -- Performance/Energy Optimization of DSP Transforms on the XScale Processor -- Arx: A Toolset for the Efficient Simulation and Direct Synthesis of High-Performance Signal Processing Algorithms -- A Throughput-Driven Task Creation and Mapping for Network Processors -- Optimizations and Architectural Tradeoffs for Embedded Systems -- MiDataSets: Creating the Conditions for a More Realistic Evaluation of Iterative Optimization -- Evaluation of Offset Assignment Heuristics -- Customizing the Datapath and ISA of Soft VLIW Processors -- Instruction Set Extension Generation with Considering Physical Constraints. 410 0$aTheoretical Computer Science and General Issues,$x2512-2029 ;$v4367 606 $aComputer science 606 $aComputer arithmetic and logic units 606 $aMicroprocessors 606 $aComputer architecture 606 $aComputer input-output equipment 606 $aLogic design 606 $aComputer networks 606 $aTheory of Computation 606 $aArithmetic and Logic Structures 606 $aProcessor Architectures 606 $aInput/Output and Data Communications 606 $aLogic Design 606 $aComputer Communication Networks 615 0$aComputer science. 615 0$aComputer arithmetic and logic units. 615 0$aMicroprocessors. 615 0$aComputer architecture. 615 0$aComputer input-output equipment. 615 0$aLogic design. 615 0$aComputer networks. 615 14$aTheory of Computation. 615 24$aArithmetic and Logic Structures. 615 24$aProcessor Architectures. 615 24$aInput/Output and Data Communications. 615 24$aLogic Design. 615 24$aComputer Communication Networks. 676 $a004.22 702 $aDe Bosschere$b Koen$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aKaeli$b David$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aStenström$b Per$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aWhalley$b David$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aUngerer$b Theo$4edt$4http://id.loc.gov/vocabulary/relators/edt 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910484914503321 996 $aHigh Performance Embedded Architectures and Compilers$9772079 997 $aUNINA