LEADER 04401nam 2200685Ia 450 001 9910462481703321 005 20200520144314.0 010 $a1-118-23455-3 010 $a1-78539-265-4 010 $a1-280-59001-7 010 $a9786613619846 010 $a1-118-22077-3 035 $a(CKB)2670000000167490 035 $a(EBL)861637 035 $a(OCoLC)784884288 035 $a(SSID)ssj0000634786 035 $a(PQKBManifestationID)12207134 035 $a(PQKBTitleCode)TC0000634786 035 $a(PQKBWorkID)10643241 035 $a(PQKB)11653708 035 $a(MiAaPQ)EBC861637 035 $a(Au-PeEL)EBL861637 035 $a(CaPaEBR)ebr10546583 035 $a(CaONFJC)MIL361984 035 $a(OCoLC)785417457 035 $a(EXLCZ)992670000000167490 100 $a20111026d2012 uy 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aEssentials of autism spectrum disorders evaluation and assessment$b[electronic resource] /$fCeline A. Saulnier, Pamela E. Ventola 210 $aHoboken, N.J. $cJohn Wiley and Sons, Inc.$dc2012 215 $a1 online resource (240 p.) 225 1 $aEssentials of psychological assessment series 300 $aDescription based upon print version of record. 311 $a0-470-62194-X 320 $aIncludes bibliographical references and index. 327 $aEssentials of Autism Spectrum Disorders Evaluation and Assessment; TABLE OF CONTENTS; Series Preface; Acknowledgments; One: Overview; Diagnostic Criteria; Asperger Syndrome; Pervasive Developmental Disorder, Not Otherwise Specified; Rett's Disorder and Childhood Disintegrative Disorder; DSM-5; Two: Assessment of Level of Functioning; Selecting Instruments; Developmental and Early Cognitive Measures; Cognitive Assessments; Neuropsychological Assessments; Qualitative Observations; Summary; Test Yourself; Answers; Three: Speech, Language, and Communication Assessment; Receptive Language 327 $aExpressive LanguagePragmatic Language/Social Communication; Stages of Language Development; Formulation of Findings; Summary; Test Yourself; Answers; Four: Assessment of Behavioral Profiles; Standardized Assessments of Behavior; Functional Behavior Assessment; Assessment of Adaptive Behavior; Summary; Test Yourself; Answers; Five: Clinical Interview and Record Review; Clinical Interview; Methods of Collecting Information on Current and Historical Presentation; Summary; Test Yourself; Answers; Six: Direct Diagnostic Assessment; Direct Observation; Diagnostic Assessment 327 $aSemistructured Measures for Diagnostic AssessmentSummary; Test Yourself; Answers; Seven: Diagnostic Differentials and Comorbidity; Intellectual Disability; Learning Profiles; Specific Language Impairment; Attention Deficit Hyperactivity Disorder; Anxiety and Tic Disorders; Mood Disorders; Psychiatric Conditions in Adulthood; Summary; Test Yourself; Answers; Eight: Case Conceptualization and Integrated Report Writing; The Parent Conference; The Written Report; Case Samples; Case Sample: Initial Diagnosis-Toddler; Case Sample: School-Aged Child With ASD; Annotated Bibliography 327 $aAbout the AuthorsAuthor Index; Subject Index 330 $aQuickly acquire the knowledge and skills you need to utilize the varied assessments frequently used in evaluating autism spectrum disorders With both the detection and awareness of autism spectrum disorders (ASD) on the rise, there is an urgent need for an increasing number of professionals to not only learn about the nature and course of the various autism spectrum disorders, but also to know how to identify, assess, and diagnose the presence of these disorders. Essentials of Autism Spectrum Disorders Evaluation and Assessment addresses the main domains of assessment, defines 410 0$aEssentials of psychological assessment series. 606 $aAutism 606 $aAsperger's syndrome 608 $aElectronic books. 615 0$aAutism. 615 0$aAsperger's syndrome. 676 $a616.85/882 700 $aSaulnier$b Celine A$0891293 701 $aVentola$b Pamela E$0891294 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910462481703321 996 $aEssentials of autism spectrum disorders evaluation and assessment$91990724 997 $aUNINA LEADER 09047nam 22008415 450 001 9910484741903321 005 20251226202953.0 010 $a3-540-40058-3 024 7 $a10.1007/11859802 035 $a(CKB)1000000000283701 035 $a(SSID)ssj0000315794 035 $a(PQKBManifestationID)11215202 035 $a(PQKBTitleCode)TC0000315794 035 $a(PQKBWorkID)10255231 035 $a(PQKB)10362367 035 $a(DE-He213)978-3-540-40058-5 035 $a(MiAaPQ)EBC3068033 035 $a(PPN)123138116 035 $a(EXLCZ)991000000000283701 100 $a20100301d2006 u| 0 101 0 $aeng 135 $aurnn#008mamaa 181 $ctxt 182 $cc 183 $acr 200 10$aAdvances in Computer Systems Architecture $e11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings /$fedited by Chris Jesshope, Colin Egan 205 $a1st ed. 2006. 210 1$aBerlin, Heidelberg :$cSpringer Berlin Heidelberg :$cImprint: Springer,$d2006. 215 $a1 online resource (XIV, 605 p.) 225 1 $aTheoretical Computer Science and General Issues,$x2512-2029 ;$v4186 300 $aBibliographic Level Mode of Issuance: Monograph 311 08$a3-540-40056-7 320 $aIncludes bibliographical references and index. 327 $aThe Era of Multi-core Chips -A Fresh Look on Software Challenges -- Streaming Networks for Coordinating Data-Parallel Programs (Position Statement) -- Implementations of Square-Root and Exponential Functions for Large FPGAs -- Using Branch Prediction Information for Near-Optimal I-Cache Leakage -- Scientific Computing Applications on the Imagine Stream Processor -- Enhancing Last-Level Cache Performance by Block Bypassing and Early Miss Determination -- A Study of the Performance Potential for Dynamic Instruction Hints Selection -- Reorganizing UNIX for Reliability -- Critical-Task Anticipation Scheduling Algorithm for Heterogeneous and Grid Computing -- Processor Directed Dynamic Page Policy -- Static WCET Analysis Based Compiler-Directed DVS Energy Optimization in Real-Time Applications -- A Study on Transformation of Self-similar Processes with Arbitrary Marginal Distributions -- ?TC ? An Intermediate Language for Programming Chip Multiprocessors -- Functional Unit Chaining: A Runtime Adaptive Architecture for Reducing Bypass Delays -- Trace-Based Data Cache Leakage Reduction at Link Time -- Parallelizing User-Defined and Implicit Reductions Globally on Multiprocessors -- Overload Protection for Commodity Network Appliances -- An Integrated Temporal Partitioning and Mapping Framework for Handling Custom Instructions on a Reconfigurable Functional Unit -- A High Performance Simulator System for a Multiprocessor System Based on a Multi-way Cluster -- Hardware Budget and Runtime System for Data-Driven Multithreaded Chip Multiprocessor -- Combining Wireless Sensor Network with Grid for Intelligent City Traffic -- A Novel Processor Architecture for Real-Time Control -- A 0-1 Integer Linear Programming Based Approach for Global Locality Optimizations -- Design and Analysis of Low Power ImageFilters Toward Defect-Resilient Embedded Memories for Multimedia SoCs -- Entropy Throttling: A Physical Approach for Maximizing Packet Mobility in Interconnection Networks -- Design of an Efficient Flexible Architecture for Color Image Enhancement -- Hypercube Communications on Optical Chordal Ring Networks with Chord Length of Three -- PMPS(3): A Performance Model of Parallel Systems -- Issues and Support for Dynamic Register Allocation -- A Heterogeneous Multi-core Processor Architecture for High Performance Computing -- Reducing the Branch Power Cost in Embedded Processors Through Static Scheduling, Profiling and SuperBlock Formation -- Fault-Free Pairwise Independent Hamiltonian Paths on Faulty Hypercubes -- Constructing Node-Disjoint Paths in Enhanced Pyramid Networks -- Striping Cache: A Global Cache for Striped Network File System -- DTuplesHPC: Distributed Tuple Space for Desktop High Performance Computing -- The Algorithm and Circuit Design of a 400MHz 16-Bit Hybrid Multiplier -- Live Range Aware Cache Architecture -- The Challenges of Efficient Code-Generation for Massively Parallel Architectures -- Reliable Systolic Computing Through Redundancy -- A Diversity-Controllable Genetic Algorithm for Optimal Fused Traffic Planning on Sensor Networks -- A Context-Switch Reduction Heuristic for Power-Aware Off-Line Scheduling -- On the Reliability of Drowsy Instruction Caches -- Design of a Reconfigurable Cryptographic Engine -- Enhancing ICOUNT2.8 Fetch Policy with Better Fairness for SMT Processors -- The New BCD Subtractor and Its Reversible Logic Implementation -- Power-Efficient Microkernel of Embedded Operating System on Chip -- Understanding Prediction Limits Through Unbiased Branches -- Bandwidth Optimization of the EMCI for a High Performance 32-bit DSP -- Research on Petersen Graphs and Hyper-cubes Connected Interconnection Networks -- Cycle Period Analysis and Optimization of Timed Circuits -- Acceleration Techniques for Chip-Multiprocessor Simulator Debug -- A DDL?Based Software Architecture Model -- Branch Behavior Characterization for Multimedia Applications -- Optimization and Evaluating of StreamYGX2 on MASA Stream Processor -- SecureTorrent: A Security Framework for File Swarming -- Register Allocation on Stream Processor with Local Register File -- A Self-reconfigurable System-on-Chip Architecture for Satellite On-Board Computer Maintenance -- Compile-Time Thread Distinguishment Algorithm on VIM-Based Architecture -- Designing a Coarse-Grained Reconfigurable Architecture Using Loop Self-Pipelining -- Low-Power Data Cache Architecture by Address Range Reconfiguration for Multimedia Applications -- Automatic Synthesis of Interface Circuits from Simplified IP Interface Protocols -- An Architectural Leakage Power Reduction Method for Instruction Cache in Ultra Deep Submicron Microprocessors -- An Efficient Approach to Energy Saving in Microcontrollers. 330 $aOn behalf of all of the people involved in the program selection, the program committee members as well as numerous other reviewers, we are both relieved and pleased to present you with the proceedings of the 2006 Asia-Pacific Computer Systems Architecture Conference (ACSAC 2006), which is being hosted in Shanghai on September 6?8, 2006. This is the 11th in a series of conferences, which started life in Australia, as the computer architecture component of the Australian Computer Science Week. In 1999 it ventured away from its roots for the first time, and the fourth Australasian Computer Architecture Conference was held in the beautiful city of Sails (Auckland, New Zealand). Perhaps it was because of a lack of any other computer architecture conference in Asia or just the attraction of traveling to the Southern Hemisphere but the conference became increasingly international during the subsequent three years and also changed its name to include Computer Systems Architecture, reflecting more the scope of the conference, which embraces both architectural and systems issues. In 2003, the conference again ventured offshore to reflect its constituency and since then has been held in Japan in the beautiful city of Aizu-Wakamatsu, followed by Beijing and Singapore. This year it again returns to China and next year will move to Korea for the first time, where it will be organized by the Korea University. 410 0$aTheoretical Computer Science and General Issues,$x2512-2029 ;$v4186 606 $aComputer systems 606 $aComputer arithmetic and logic units 606 $aComputer input-output equipment 606 $aLogic design 606 $aComputer networks 606 $aMicroprocessors 606 $aComputer architecture 606 $aComputer System Implementation 606 $aArithmetic and Logic Structures 606 $aInput/Output and Data Communications 606 $aLogic Design 606 $aComputer Communication Networks 606 $aProcessor Architectures 615 0$aComputer systems. 615 0$aComputer arithmetic and logic units. 615 0$aComputer input-output equipment. 615 0$aLogic design. 615 0$aComputer networks. 615 0$aMicroprocessors. 615 0$aComputer architecture. 615 14$aComputer System Implementation. 615 24$aArithmetic and Logic Structures. 615 24$aInput/Output and Data Communications. 615 24$aLogic Design. 615 24$aComputer Communication Networks. 615 24$aProcessor Architectures. 676 $a004.2/2 701 $aJesshope$b C. R$0632034 701 $aEgan$b Colin$f1956-$01761723 712 12$aACSAC (Asia-Pacific Computer Systems Architecture Conference) 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910484741903321 996 $aAdvances in computer systems architecture$94201329 997 $aUNINA