LEADER 04102nam 2200565 a 450 001 9910484142403321 005 20200520144314.0 010 $a3-642-36157-9 024 7 $a10.1007/978-3-642-36157-9 035 $a(CKB)3400000000102980 035 $a(SSID)ssj0000880021 035 $a(PQKBManifestationID)11509150 035 $a(PQKBTitleCode)TC0000880021 035 $a(PQKBWorkID)10873609 035 $a(PQKB)10409838 035 $a(DE-He213)978-3-642-36157-9 035 $a(MiAaPQ)EBC3068803 035 $a(PPN)168329840 035 $a(EXLCZ)993400000000102980 100 $a20121211d2013 uy 0 101 0 $aeng 135 $aurnn#008mamaa 181 $ctxt 182 $cc 183 $acr 200 10$aIntegrated circuit and system design $epower and timing modeling, optimization and simulation : 22nd International Workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4-6, 2012 : revised selected papers /$fJose L. Ayala, Delong Shang, Alex Yakovlev (eds.) 205 $a1st ed. 2013. 210 $aNew York $cSpringer$d2013 215 $a1 online resource (IX, 258 p. 150 illus.) 225 0$aLecture notes in computer science,$x0302-9743 ;$v7606 225 0$aLNCS sublibrary.$nSL 1,$pTheoretical computer science and general issues 300 $aBibliographic Level Mode of Issuance: Monograph 311 $a3-642-36156-0 320 $aIncludes bibliographical references and index. 327 $aSleep-Transistor Based Power-Gating Tradeoff Analyses -- Modelling and Analysis of Manufacturing Variability Effects from Process to Architectural Level -- Non-invasive Power Simulation at System-Level with SystemC -- A Standard Cell Optimization Method for Near-Threshold Voltage Operations -- An Extended Metastability Simulation Method for Synchronizer Characterization -- Phase Space Based NBTI Model -- Fast Propagation of Hamming and Signal Distances for Register-Transfer Level Datapaths -- Noise Margin Based Library Optimization Considering Variability in Sub-threshold -- TCP Window Based DVFS for Low Power Network Controller SoC -- A Generic Architecture for Robust Asynchronous Communication Links -- Direct Statistical Simulation of Timing Properties in Sequential Circuits -- On-Chip NBTI and PBTI Tracking through an All-Digital Aging Monitor Architecture -- Two-Phase MOBILE Interconnection Schemes for Ultra-Grain Pipeline Applications -- Design of a 150 mV Supply, 2 MIPS, 90nm CMOS, Ultra-Low-Power Microprocessor -- Run-Time Measurement of Harvested Energy for Autarkic Sensor Operation -- Observability Conditions and Automatic Operand-Isolation in High-Throughput Asynchronous Pipelines -- Dynamic Power Management of a Computer with Self Power-Managed Components -- Case Studies of Logical Computation on Stochastic Bit Streams. 330 $aThis book constitutes the refereed proceedings of the 22nd International Conference on Integrated Circuit and System Design, PATMOS 2012, held in Newcastle, UK Spain, in September 2012. The 25 revised full papers presented were carefully reviewed and selected from numerous submissions. The paper feature emerging challenges in methodologies and tools for the design of upcoming generations of integrated circuits and systems, including reconfigurable hardware such as FPGAs. The technical program focus on timing, performance and power consumption as well as architectural aspects with particular emphasis on modeling, design, characterization, analysis and optimization. 410 0$aTheoretical Computer Science and General Issues,$x2512-2029 ;$v7606 606 $aIntegrated circuits$xVery large scale integration$xComputer-aided design$vCongresses 615 0$aIntegrated circuits$xVery large scale integration$xComputer-aided design 676 $a004.24 701 $aAyala$b Jose L$0980154 701 $aShang$b Delong$01755319 701 $aYakovlev$b Alex$01755320 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910484142403321 996 $aIntegrated circuit and system design$94192056 997 $aUNINA