LEADER 07488nam 22008895 450 001 9910484021703321 005 20251226195245.0 010 $a1-280-90213-2 010 $a9786610902132 010 $a3-540-69330-0 024 7 $a10.1007/978-3-540-69330-7 035 $a(CKB)1000000000283909 035 $a(SSID)ssj0000301321 035 $a(PQKBManifestationID)11226467 035 $a(PQKBTitleCode)TC0000301321 035 $a(PQKBWorkID)10261060 035 $a(PQKB)11695216 035 $a(DE-He213)978-3-540-69330-7 035 $a(MiAaPQ)EBC3036656 035 $a(MiAaPQ)EBC6806116 035 $a(Au-PeEL)EBL6806116 035 $a(OCoLC)262693959 035 $a(PPN)123140307 035 $a(MiAaPQ)EBC302169 035 $a(BIP)13947302 035 $a(EXLCZ)991000000000283909 100 $a20100301d2006 u| 0 101 0 $aeng 135 $aurnn|008mamaa 181 $ctxt 182 $cc 183 $acr 200 10$aLanguages and Compilers for Parallel Computing $e18th International Workshop, LCPC 2005, Hawthorne, NY, USA, October 20-22, 2005, Revised Selected Papers /$fedited by Eduard Ayguadé, Gerald Baumgartner, J. Ramanujam, P. Sadayappan 205 $a1st ed. 2006. 210 1$aBerlin, Heidelberg :$cSpringer Berlin Heidelberg :$cImprint: Springer,$d2006. 215 $a1 online resource (XII, 480 p.) 225 1 $aTheoretical Computer Science and General Issues,$x2512-2029 ;$v4339 300 $aBibliographic Level Mode of Issuance: Monograph 311 08$a3-540-69329-7 320 $aIncludes bibliographical references and index. 327 $aRevisiting Graph Coloring Register Allocation: A Study of the Chaitin-Briggs and Callahan-Koblenz Algorithms -- Register Pressure in Software-Pipelined Loop Nests: Fast Computation and Impact on Architecture Design -- Manipulating MAXLIVE for Spill-Free Register Allocation -- Optimizing Packet Accesses for a Domain Specific Language on Network Processors -- Array Replication to Increase Parallelism in Applications Mapped to Configurable Architectures -- Generation of Control and Data Flow Graphs from Scheduled and Pipelined Assembly Code -- Applying Data Copy to Improve Memory Performance of General Array Computations -- A Cache-Conscious Profitability Model for Empirical Tuning of Loop Fusion -- Optimizing Matrix Multiplication with a Classifier Learning System -- A Language for the Compact Representation of Multiple Program Versions -- Efficient Computation of May-Happen-in-Parallel Information for Concurrent Java Programs -- Evaluating the Impact of Thread Escape Analysis on a Memory Consistency Model-Aware Compiler -- Concurrency Analysis for Parallel Programs with Textually Aligned Barriers -- Titanium Performance and Potential: An NPB Experimental Study -- Efficient Search-Space Pruning for Integrated Fusion and Tiling Transformations -- Automatic Measurement of Instruction Cache Capacity -- Combined ILP and Register Tiling: Analytical Model and Optimization Framework -- Analytic Models and Empirical Search: A Hybrid Approach to Code Optimization -- Testing Speculative Work in a Lazy/Eager Parallel Functional Language -- Loop Selection for Thread-Level Speculation -- Software Thread Level Speculation for the Java Language and Virtual Machine Environment -- Lightweight Monitoring of the Progress of Remotely Executing Computations -- Using Platform-Specific Performance Counters for Dynamic Compilation -- A Domain-Specific Interpreter for Parallelizing a Large Mixed-Language Visualisation Application -- Compiler Control Power Saving Scheme for Multi Core Processors -- Code Transformations for One-Pass Analysis -- Scalable Array SSA and Array Data Flow Analysis -- Interprocedural Symbolic Range Propagation for Optimizing Compilers -- Parallelization of Utility Programs Based on Behavior Phase Analysis -- A Systematic Approach to Model-Guided Empirical Search for Memory Hierarchy Optimization -- An Efficient Approach for Self-scheduling Parallel Loops on Multiprogrammed Parallel Computers -- Dynamic Compilation for Reducing Energy Consumption of I/O-Intensive Applications -- Supporting SELL for High-Performance Computing -- Compiler Supports and Optimizations for PAC VLIW DSP Processors. 330 $aThe 18th International Workshop on Languages and Compilers for High- Performance Computing was scheduled to be held in New Orleans, Louisiana, in October 2005.Unfortunately, because of the devastation caused by Hurricane Katrina the meeting needed to be moved. It was held in Hawthorne, New York, thanks to help from IBM. The workshopis an annual forum for leading research groups to present their current research activities and the latest results, cov- ing languages, compiler techniques, runtime environments, and compiler-related performance evaluation for parallel and high-performance computing. Sixty-?ve researchersfromCanada,France,Japan,Korea,P.R.China, Spain,Switzerland, Taiwan, UK, and the USA attended the workshop. Thirty-four research papers (26 regular papers and eight short papers) were presented at the workshop. These papers were reviewed by the Program C- mittee; external reviewers were used as needed. The authors then received - ditional comments during the workshop. The revisions after the workshop are now assembled into these ?nal proceedings. Wethank Siddhartha ChatterjeefromtheIBMT.J.WatsonResearchCenter for his keynote talk titled "The Changing Landscape of Parallel Computing." The workshop included a special session titled "High-Productivity Languages for HPC: Compiler Challenges" consisting of invited talks on the three l- guages being developed by the DARPA High-Productivity Computing Systems (HPCS)vendors.ThetalksweregivenbySteveDietz(fromCrayonthelanguage Chapel), Vivek Sarkar(from IBMon the languageX10), andDavid Chase(from Sun on the languageFortress). Frederica Darema gavea presentation during the workshop banquet about the proposed Dynamic Data-Driven Applications S- tems (DDDAS) program at the US National Science Foundation. 410 0$aTheoretical Computer Science and General Issues,$x2512-2029 ;$v4339 606 $aCompilers (Computer programs) 606 $aComputer programming 606 $aComputer science 606 $aComputer networks 606 $aComputer arithmetic and logic units 606 $aArtificial intelligence$xData processing 606 $aCompilers and Interpreters 606 $aProgramming Techniques 606 $aTheory of Computation 606 $aComputer Communication Networks 606 $aArithmetic and Logic Structures 606 $aData Science 615 0$aCompilers (Computer programs). 615 0$aComputer programming. 615 0$aComputer science. 615 0$aComputer networks. 615 0$aComputer arithmetic and logic units. 615 0$aArtificial intelligence$xData processing. 615 14$aCompilers and Interpreters. 615 24$aProgramming Techniques. 615 24$aTheory of Computation. 615 24$aComputer Communication Networks. 615 24$aArithmetic and Logic Structures. 615 24$aData Science. 676 $a004.35 702 $aAyguade?$b Eduard 712 12$aWorkshop on Languages and Compilers for Parallel Computing 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910484021703321 996 $aLanguages and Compilers for Parallel Computing$9772572 997 $aUNINA