LEADER 06434nam 22008415 450 001 9910483608403321 005 20221027002706.0 010 $a1-280-93577-4 010 $a9786610935772 010 $a3-540-70952-5 024 7 $a10.1007/978-3-540-70952-7 035 $a(CKB)1000000000478496 035 $a(EBL)3061588 035 $a(SSID)ssj0000157229 035 $a(PQKBManifestationID)11155876 035 $a(PQKBTitleCode)TC0000157229 035 $a(PQKBWorkID)10138642 035 $a(PQKB)11688915 035 $a(DE-He213)978-3-540-70952-7 035 $a(MiAaPQ)EBC3061588 035 $a(MiAaPQ)EBC6283751 035 $a(PPN)123160405 035 $a(EXLCZ)991000000000478496 100 $a20100301d2007 u| 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aFormal Methods: Applications and Technology $e11th International Workshop on Formal Methods for Industrial Critical Systems, FMICS 2006, and 5th International Workshop on Parallel and Distributed Methods in Verification, PDMC 2006, Bonn, Germany, August 26-27, and August 31, 2006, Revised Selected /$fedited by Lubos Brim, Boudewijn Haverkort, Martin Leucker, Jaco van de Pol 205 $a1st ed. 2007. 210 1$aBerlin, Heidelberg :$cSpringer Berlin Heidelberg :$cImprint: Springer,$d2007. 215 $a1 online resource (371 p.) 225 1 $aProgramming and Software Engineering ;$v4346 300 $aDescription based upon print version of record. 311 $a3-540-70951-7 320 $aIncludes bibliographical references and index. 327 $aInvited Contributions -- Challenges for Formal Verification in Industrial Setting -- Distributed Verification: Exploring the Power of Raw Computing Power -- FMICS -- An Easy-to-Use, Efficient Tool-Chain to Analyze the Availability of Telecommunication Equipment -- ?To Store or Not To Store? Reloaded: Reclaiming Memory on Demand -- Discovering Symmetries -- On Combining Partial Order Reduction with Fairness Assumptions -- Test Coverage for Loose Timing Annotations -- Model-Based Testing of a WAP Gateway: An Industrial Case-Study -- Heuristics for ioco-Based Test-Based Modelling -- Verifying VHDL Designs with Multiple Clocks in SMV -- Verified Design of an Automated Parking Garage -- Evaluating Quality of Service for Service Level Agreements -- Simulation-Based Performance Analysis of a Medical Image-Processing Architecture -- Blasting Linux Code -- A Finite State Modeling of AFDX Frame Management Using Spin -- UML 2.0 State Machines: Complete Formal Semantics Via core state machine -- Automated Incremental Synthesis of Timed Automata -- SAT-Based Verification of LTL Formulas -- jmle: A Tool for Executing JML Specifications Via Constraint Programming -- Goanna?A Static Model Checker -- PDMC -- Parallel SAT Solving in Bounded Model Checking -- Parallel Algorithms for Finding SCCs in Implicitly Given Graphs -- Can Saturation Be Parallelised? -- Distributed Colored Petri Net Model-Checking with Cyclades. 330 $aThese are the joint ?nal proceedings of the 11th International Workshop on Formal Methods for Industrial Critical Systems (FMICS 2006) and the ?fth International Workshop on Parallel and Distributed Methods in Veri?cation (PDMC 2006). Both workshops were organized as satellite events of CONCUR 2006, the 17th International Conference on Concurrency Theory that was or- nized in Bonn, August 2006. The FMICS workshop continued successfully the aim of the FMICS working group ? to promote the use of formal methods for industrial applications, by supporting research in this area and its application in industry. The emphasis in these workshops is on the exchange of ideas between researchers and prac- tioners, in both industry and academia. This year the Program Committee received a record number of submissions. The 16 accepted regular contributions and 2 accepted tool papers, selected out of a total of 47 submissions, cover formal methodologies for handling large state spaces, model-based testing, formal description and analysis techniques as well as a range of applications and case studies. The workshop program included two invited talks, by Anna Slobodova from Intel on ?Challenges for Formal Veri?cation in an Industrial Setting? and by Edward A. Lee from the University of California at Berkeley on ?Making C- currency Mainstream.? The former full paper can be found in this volume. 410 0$aProgramming and Software Engineering ;$v4346 606 $aComputers 606 $aSoftware engineering 606 $aComputer logic 606 $aProgramming languages (Electronic computers) 606 $aSpecial purpose computers 606 $aTheory of Computation$3https://scigraph.springernature.com/ontologies/product-market-codes/I16005 606 $aSoftware Engineering$3https://scigraph.springernature.com/ontologies/product-market-codes/I14029 606 $aLogics and Meanings of Programs$3https://scigraph.springernature.com/ontologies/product-market-codes/I1603X 606 $aProgramming Languages, Compilers, Interpreters$3https://scigraph.springernature.com/ontologies/product-market-codes/I14037 606 $aSpecial Purpose and Application-Based Systems$3https://scigraph.springernature.com/ontologies/product-market-codes/I13030 615 0$aComputers. 615 0$aSoftware engineering. 615 0$aComputer logic. 615 0$aProgramming languages (Electronic computers). 615 0$aSpecial purpose computers. 615 14$aTheory of Computation. 615 24$aSoftware Engineering. 615 24$aLogics and Meanings of Programs. 615 24$aProgramming Languages, Compilers, Interpreters. 615 24$aSpecial Purpose and Application-Based Systems. 676 $a004.0151 702 $aBrim$b Lubos$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aHaverkort$b Boudewijn R$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aLeucker$b Martin$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aPol$b Jaco van de$4edt$4http://id.loc.gov/vocabulary/relators/edt 712 12$aPDMC 2006$f(2006 :$eBonn, Germany) 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910483608403321 996 $aFormal Methods: Applications and Technology$9771923 997 $aUNINA