LEADER 06066nam 22007695 450 001 9910483188903321 005 20200629195935.0 010 $a3-319-46520-1 024 7 $a10.1007/978-3-319-46520-3 035 $a(CKB)3710000000889723 035 $a(DE-He213)978-3-319-46520-3 035 $a(MiAaPQ)EBC6305214 035 $a(MiAaPQ)EBC5586849 035 $a(Au-PeEL)EBL5586849 035 $a(OCoLC)960643878 035 $a(PPN)196323045 035 $a(EXLCZ)993710000000889723 100 $a20160921d2016 u| 0 101 0 $aeng 135 $aurnn#008mamaa 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aAutomated Technology for Verification and Analysis $e14th International Symposium, ATVA 2016, Chiba, Japan, October 17-20, 2016, Proceedings /$fedited by Cyrille Artho, Axel Legay, Doron Peled 205 $a1st ed. 2016. 210 1$aCham :$cSpringer International Publishing :$cImprint: Springer,$d2016. 215 $a1 online resource (XI, 530 p. 102 illus.) 225 1 $aProgramming and Software Engineering ;$v9938 311 $a3-319-46519-8 327 $aKeynote -- Synthesizing and Completely Testing Hardware based on Templates through Small Numbers of Test Patterns -- Markov Models, Chains, and Decision Processes -- Approximate Policy Iteration for Markov Decision Processes via Quantitative Adaptive Aggregations. -Optimizing the Expected Mean Payoff in Energy Markov Decision Processes -- Parameter Synthesis for Markov Models: Faster Than Ever -- Bounded Model Checking for Probabilistic Programs -- Counter Systems, Automata -- How Hard Is It to Verify Flat Affine Counter Systems with the Finite Monoid Property -- Solving Language Equations using Flanked Automata -- Spot 2.0 - a Framework for LTL and ?-Automata Manipulation -- MoChiBA: Probabilistic LTL Model Checking Using Limit- Deterministic Büchi Automata -- Parallelism, Concurrency -- Synchronous Products of Rewrite Systems -- Specifying and Verifying Secrecy in Workflows with Arbitrarily Many Agents -- Lazy Sequentialization for the Safety Verification of Unbounded Concurrent Programs -- Parallel SMT-Based Parameter Synthesis with Application to Piecewise Multi-Affine Systems -- Complexity, Decidability -- On Finite Domains in First-Order Linear Temporal Logic -- Decidability Results for Multi-Objective Stochastic Games -- A Decision Procedure for Separation Logic in SMT -- Solving Mean-Payoff Games on the GPU -- Synthesis, Refinement -- Synthesizing Skeletons for Reactive Systems -- Observational Refinement and Merge for Disjunctive MTSs -- Equivalence-Based Abstraction Refinement for muHORS Model Checking -- Optimization, Heuristics, Partial-Order Reductions -- Greener Bits: Formal Analysis of Demand Response -- Heuristics for Checking Liveness Properties with Partial Order Reductions. - Partial-Order Reduction for GPU Model Checking -- Efficient Verification of Program Fragments: Eager POR -- Solving Procedures, Model Checking -- Skolem Functions for DQBF -- STL Model Checking of Continuous and Hybrid Systems -- Clause Sharing and Partitioning for Cloud-Based SMT Solving -- Symbolic Model Checking for Factored Probabilistic Models -- Program Analysis -- A Sketching-Based Approach for Debugging Using Test Cases -- Polynomial Invariants by Linear Algebra -- Certified Symbolic Execution -- Tighter Loop Bound Analysis. . 330 $aThis book constitutes the proceedings of the 14th International Symposium on Automated Technology for Verification and Analysis, ATVA 2016, held in Chiba, Japan, in October 2016. The 31 papers presented in this volume were carefully reviewed and selected from 82 submissions. They were organized in topical sections named: keynote; Markov models, chains, and decision processes; counter systems, automata; parallelism, concurrency; complexity, decidability; synthesis, refinement; optimization, heuristics, partial-order reductions; solving procedures, model checking; and program analysis. . 410 0$aProgramming and Software Engineering ;$v9938 606 $aSoftware engineering 606 $aProgramming languages (Electronic computers) 606 $aComputer logic 606 $aMathematical logic 606 $aArtificial intelligence 606 $aComputer programming 606 $aSoftware Engineering$3https://scigraph.springernature.com/ontologies/product-market-codes/I14029 606 $aProgramming Languages, Compilers, Interpreters$3https://scigraph.springernature.com/ontologies/product-market-codes/I14037 606 $aLogics and Meanings of Programs$3https://scigraph.springernature.com/ontologies/product-market-codes/I1603X 606 $aMathematical Logic and Formal Languages$3https://scigraph.springernature.com/ontologies/product-market-codes/I16048 606 $aArtificial Intelligence$3https://scigraph.springernature.com/ontologies/product-market-codes/I21000 606 $aProgramming Techniques$3https://scigraph.springernature.com/ontologies/product-market-codes/I14010 615 0$aSoftware engineering. 615 0$aProgramming languages (Electronic computers). 615 0$aComputer logic. 615 0$aMathematical logic. 615 0$aArtificial intelligence. 615 0$aComputer programming. 615 14$aSoftware Engineering. 615 24$aProgramming Languages, Compilers, Interpreters. 615 24$aLogics and Meanings of Programs. 615 24$aMathematical Logic and Formal Languages. 615 24$aArtificial Intelligence. 615 24$aProgramming Techniques. 676 $a004.015113 702 $aArtho$b Cyrille$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aLegay$b Axel$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aPeled$b Doron$4edt$4http://id.loc.gov/vocabulary/relators/edt 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910483188903321 996 $aAutomated Technology for Verification and Analysis$9772478 997 $aUNINA