LEADER 01229nam 2200385Ia 450 001 9910464419503321 005 20200520144314.0 035 $a(CKB)3440000000000902 035 $a(MiAaPQ)EBC305549 035 $a(Au-PeEL)EBL305549 035 $a(CaPaEBR)ebr10188606 035 $a(OCoLC)476083031 035 $a(EXLCZ)993440000000000902 100 $a20070227d2007 uy 0 101 0 $aeng 135 $aurcn||||||||| 200 10$aDesign recipes for FPGAs$b[electronic resource] /$fPeter R. Wilson 210 $aAmsterdam ;$aBoston ;$aLondon $cNewnes$d2007 215 $axxii, 289 p. $cill 311 $a0-7506-6845-8 320 $aIncludes bibliographical references (p. [284]-285) and index. 606 $aField programmable gate arrays$xDesign and construction 606 $aGate array circuits 608 $aElectronic books. 615 0$aField programmable gate arrays$xDesign and construction. 615 0$aGate array circuits. 676 $a621.395 700 $aWilson$b Peter R$g(Peter Robert),$f1939-$0920521 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910464419503321 996 $aDesign recipes for FPGAs$92064555 997 $aUNINA