LEADER 05804nam 2200673 450 001 9910459790103321 005 20200520144314.0 010 $a1-60650-513-0 024 7 $z10.5643/9781606504871 035 $a(CKB)3710000000329597 035 $a(EBL)1911666 035 $a(SSID)ssj0001539400 035 $a(PQKBManifestationID)11874499 035 $a(PQKBTitleCode)TC0001539400 035 $a(PQKBWorkID)11532398 035 $a(PQKB)10102277 035 $a(OCoLC)900732839 035 $a(CaBNvSL)swl00404623 035 $a(MiAaPQ)EBC1911666 035 $a(Au-PeEL)EBL1911666 035 $a(CaPaEBR)ebr11007948 035 $a(CaONFJC)MIL688595 035 $a(OCoLC)900898190 035 $a(EXLCZ)993710000000329597 100 $a20190123d2015 uy 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 12$aA one-semester course in modeling of VLSI interconnections /$fAshok K. Goel 210 1$aNew York, NY :$cMomentum Press,$d[2015] 210 4$dİ2015 215 $a1 online resource (362 p.) 225 1 $aElectronic circuits and semiconductor devices collection 300 $aDescription based upon print version of record. 311 $a1-60650-512-2 320 $aIncludes bibliographical references and index. 327 $a1. Introductory concepts -- 1.1 Metallic interconnections -- 1.2 Simplified modeling of resistive interconnections as ladder networks -- 1.3 Propagation modes in a metallic interconnection -- 1.4 Slow-wave mode -- 1.5 Propagation delays -- 327 $a2. Modeling of interconnection resistances, capacitances, and inductances -- 2.1 Interconnection resistance -- 2.2 Modeling of resistance for a copper interconnection -- 2.3 Interconnection capacitances -- 2.4 The Green's function method, Method of images -- 2.5 Green's function method, Fourier integral approach -- 2.6 Interconnection inductances -- 2.7 Inductance extraction using FastHenry -- 2.8 Approximate equations for capacitances -- 2.9 Approximate equations for interconnection capacitances and inductances on silicon and GaAs substrates -- 327 $a3. Modeling of interconnection delays -- 3.1 Metal-insulator-semiconductor microstrip line model of an interconnection -- 3.2 Transmission line analysis of single-level interconnections -- 3.3 Transmission line model for multilevel interconnections -- 3.4 Modeling of parallel and crossing interconnections -- 3.5 Modeling of very-high-frequency losses in interconnections -- 3.6 Compact modeling of interconnection delays -- 3.7 Modeling of active interconnections -- 327 $a4. Modeling of interconnection crosstalk -- 4.1 Lumped capacitance model -- 4.2 Coupled multiconductor MIS microstrip line model -- 4.3 Frequency-domain model analysis of single-level interconnections -- 4.4 Transmission line analysis of parallel multilevel interconnections -- 4.5 Compact expressions for crosstalk analysis -- 327 $a5. Modeling of electromigration-induced interconnection failure -- 5.1 Electromigration factors and mechanism -- 5.2 Problems caused by electromigration -- 5.3 Reduction of electromigration -- 5.4 Measurement of electromigration -- 5.5 Electromigration in the copper interconnections -- 5.6 Models of integrated circuit reliability -- 5.7 Modeling of electromigration due to current pulses -- 5.8 Guidelines for testing electromigration -- 327 $a6. Other interconnection technologies -- 6.1 Optical interconnections -- 6.2 Superconducting interconnections -- 6.3 Nanotechnology circuit interconnections -- 327 $aAppendixes -- A. Tables of constants -- B. Method of images -- C. Method of moments -- D. Transmission line equations -- E. Miller's theorem -- F. Inverse Laplace transformation technique -- Index. 330 3 $aQuantitative understanding of the parasitic capacitances and inductances and the resultant propagation delays and crosstalk phenomena associated with the metallic interconnections on the very large scale integrated (VLSI) circuits has become extremely important for the optimum design of the state-of-the-art integrated circuits. It is because more than 65 percent of the delays on the integrated circuit chip occur in the interconnections and not in the transistors on the chip. Mathematical techniques to model the parasitic capacitances, inductances, propagation delays, crosstalk noise, and electromigration-induced failure associated with the interconnections in the realistic high-density environment on a chip will be discussed. An overview of the future interconnection technologies for the nanotechnology circuits will also be presented. This book will be the first book of its kind written for a one-semester course on the mathematical modeling of metallic interconnections on a VLSI circuit. In most institutions around the world offering BS, MS, and Ph.D. degrees in Electrical and Computer Engineering, such a course will be suitable for the first-year graduate students and it will also be appropriate as an elective course for senior level BS students. This book will also be of interest to practicing engineers in the field who are looking for a quick refresher on this subject. 410 0$aElectronic circuits and semiconductor devices collection. 606 $aIntegrated circuits$xVery large scale integration$xMathematical models 608 $aElectronic books. 615 0$aIntegrated circuits$xVery large scale integration$xMathematical models. 676 $a621.395 700 $aGoel$b Ashok K.$f1953-$0462325 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910459790103321 996 $aA one-semester course in modeling of VLSI interconnections$92160827 997 $aUNINA