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101 0 $aeng
135   $aur|||||||||||
181   $ctxt$2rdacontent
182   $cc$2rdamedia
183   $acr$2rdacarrier
200 00$aPractical design verification /$fedited by Dhiraj K. Pradhan, Ian G. Harris$b[electronic resource]
210  1$aCambridge :$cCambridge University Press,$d2009.
215   $a1 online resource (xi, 276 pages) $cdigital, PDF file(s)
300   $aTitle from publisher's bibliographic system (viewed on 05 Oct 2015).
311   $a0-521-85972-7 
320   $aIncludes bibliographical references and index.
327   $aModel checking and equivalence checking / Masahiro Fujita -- Transaction-level system modeling / Daniel Gajski and Samar Abdi -- Response checkers, monitors, and assertions / Harry Foster -- System debugging strategies / Wayne H. Wolf -- Test generation and coverage metrics / Ernesto Sa?nchez, Giovanni Squillero, and Matteo Sonza Reorda -- SystemVerilog and Vera in a verification flow / Shireesh Verma and Ian G. Harris -- Decision diagrams for verification / Maciej Ciesielski, Dhiraj K. Pradhan, and Abusaleh M. Jabir -- Boolean satisfiability and EDA applications / Joao Marques-Silva.
330   $aImprove design efficiency and reduce costs with this practical guide to formal and simulation-based functional verification. Giving you a theoretical and practical understanding of the key issues involved, expert authors including Wayne Wolf and Dan Gajski explain both formal techniques (model checking, equivalence checking) and simulation-based techniques (coverage metrics, test generation). You get insights into practical issues including hardware verification languages (HVLs) and system-level debugging. The foundations of formal and simulation-based techniques are covered too, as are more recent research advances including transaction-level modeling and assertion-based verification, plus the theoretical underpinnings of verification, including the use of decision diagrams and Boolean satisfiability (SAT).
606   $aIntegrated circuits$xVerification
615  0$aIntegrated circuits$xVerification.
676   $a621.3815/48
702   $aPradhan$b Dhiraj K.
702   $aHarris$b Ian G.
801  0$bUkCbUP
801  1$bUkCbUP
906   $aBOOK
912   $a9910454505003321
996   $aPractical design verification$92465880
997   $aUNINA