LEADER 02694nam 22004213 450 001 9910450420303321 005 20210901202724.0 010 $a1-4020-2518-1 035 $a(CKB)1000000000228988 035 $a(MiAaPQ)EBC197899 035 $a(MiAaPQ)EBC3036092 035 $a(MiAaPQ)EBC3072640 035 $a(Au-PeEL)EBL197899 035 $a(OCoLC)56084430 035 $a(EXLCZ)991000000000228988 100 $a20210901d2004 uy 0 101 0 $aeng 135 $aurcnu|||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aDesign and Analysis of High Efficiency Line Drivers for xDSL 210 1$aDordrecht :$cSpringer,$d2004. 210 4$dİ2004. 215 $a1 online resource (258 pages) 311 $a1-4020-7727-0 327 $aPreliminaries -- Contents -- List of Figures -- List of Tables -- 1. INTRODUCTION -- 2. TRADITIONAL XDSL LINE DRIVERS -- 3. DESCRIBING FUNCTION ANALYSIS -- 4. BEHAVIOURAL MODELLING OF THE SOPA -- 5. DESIGN PLAN AND CAD-TOOLS -- 6. REALISATIONS IN MAINSTREAM CMOS -- 7. CONCLUSIONS -- Glossary -- Appendices -- References -- Index. 330 $aDesign and Analysis of High Efficiency Line Drivers for xDSL covers the most important building block of an xDSL (ADSL, VDSL, ) system: the line driver. Traditional Class AB line drivers consume more than 70 per cent of the total power budget of state-of-the-art ADSL modems. This book describes the main difficulties in designing line drivers for xDSL. The most important specifications are elaborated staring from the main properties of the channel and the signal properties. The traditional (class AB), state-of-the-art (class G) and future technologies (class K) are discussed. The main part of Design and Analysis of High Efficiency Line Drivers for xDSL describes the design of a novel architecture: the Self-Oscillating Power Amplifier or SOPA. This architecture uses a non-linear, asynchronous modulation scheme that enables highly efficient, highly linear transmission. The concept has been proven by two implementations in a digital CMOS technology: a G-Lite compliant line driver with 61 per cent efficiency and a full ADSL-VDSL downstream compliant power amplifier with 47 per cent power efficiency. The proposed architecture is fully analysed and complete design plans including CMOS sca. 608 $aElectronic books. 700 $aPiessens$b Tim$0848894 701 $aSteyaert$b Michiel$0720923 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910450420303321 996 $aDesign and Analysis of High Efficiency Line Drivers for xDSL$91895970 997 $aUNINA