LEADER 03896nam 2200673Ia 450 001 9910438044903321 005 20200520144314.0 010 $a9786613924421 010 $a9781283611978 010 $a128361197X 010 $a9781461413561 010 $a1461413567 024 7 $a10.1007/978-1-4614-1356-1 035 $a(CKB)2560000000090354 035 $a(EBL)971455 035 $a(OCoLC)806959713 035 $a(SSID)ssj0000741502 035 $a(PQKBManifestationID)11411182 035 $a(PQKBTitleCode)TC0000741502 035 $a(PQKBWorkID)10721438 035 $a(PQKB)10829255 035 $a(DE-He213)978-1-4614-1356-1 035 $a(MiAaPQ)EBC971455 035 $a(PPN)168295210 035 $a(EXLCZ)992560000000090354 100 $a20120820h20122013 uy 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aMulti-objective optimization in physical synthesis of integrated circuits /$fDavid A. Papa, Igor L. Markov 205 $a1st ed. 2013. 210 $aNew York, NY $cSpringer$d2012, c2013 215 $a1 online resource (157 p.) 225 0$aLecture notes in electrical engineering,$x1876-1100 ;$vv. 166 300 $aDescription based upon print version of record. 311 08$a9781493900800 311 08$a1493900803 311 08$a9781461413554 311 08$a1461413559 320 $aIncludes bibliographical references. 327 $aPart I: Introduction and Prior Art -- Timing Closure for Multi-Million-Gate Integrated Circuits -- State of the Art in Physical Synthesis -- Part II: Local Physical Synthesis and Necessary Analysis Techniques -- Buffer Insertion during Timing-Driven Placement -- Bounded Transactional Timing Analysis -- Gate Sizing During Timing-Driven Placement -- Part III: Broadening the Scope of Circuit Transformations -- Physically-Driven Logic Restructuring -- Logic Restructuring as an Aid to Physical Retiming -- Broadening the Scope of Optimization using Partitioning -- Co-Optimization of Latches and Clock Networks -- Conclusions and Future Work. 330 $aThis book introduces techniques that advance the capabilities and strength of modern software tools for physical synthesis, with the ultimate goal to improve the quality of leading-edge semiconductor products.  It provides a comprehensive introduction to physical synthesis and takes the reader methodically from first principles through state-of-the-art optimizations used in cutting edge industrial tools. It explains how to integrate chip optimizations in novel ways to create powerful circuit transformations that help satisfy performance requirements. Broadens the scope of physical synthesis optimization to include accurate transformations operating between the global and local scales; Integrates groups of related transformations to break circular dependencies and increase the number of circuit elements that can be jointly optimized to escape local minima;  Derives several multi-objective optimizations from first observations through complete algorithms and experiments; Describes integrated optimization techniques that ensure a graceful timing closure process and impact nearly every aspect of a typical physical synthesis flow. 410 0$aLecture Notes in Electrical Engineering,$x1876-1100 ;$v166 606 $aIntegrated circuits$xDesign and construction 606 $aTiming circuits 615 0$aIntegrated circuits$xDesign and construction. 615 0$aTiming circuits. 676 $a621.38173 700 $aPapa$b David A$01750206 701 $aMarkov$b Igor L$g(Igor Leonidovich),$f1973-$01750207 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910438044903321 996 $aMulti-objective optimization in physical synthesis of integrated circuits$94184780 997 $aUNINA