LEADER 03166nam 2200553Ia 450 001 9910438038403321 005 20200520144314.0 010 $a1-299-40803-6 010 $a94-007-3958-3 024 7 $a10.1007/978-94-007-3958-1 035 $a(OCoLC)832286052 035 $a(MiFhGG)GVRL6XJN 035 $a(CKB)2550000001018207 035 $a(MiAaPQ)EBC1106203 035 $a(EXLCZ)992550000001018207 100 $a20130326d2013 uy 0 101 0 $aeng 135 $aurun|---uuuua 181 $ctxt 182 $cc 183 $acr 200 10$aModeling, analysis and optimization of network-on-chip communication architectures /$fby Umit Y. Ogras, Radu Marculescu 205 $a1st ed. 2013. 210 $aNew York $cSpringer$dc2013 215 $a1 online resource (xiv, 174 pages) $cillustrations (some color) 225 1 $aLecture notes in electrical engineering ;$v184 300 $a"ISSN: 1876-1100." 311 $a94-007-9865-2 311 $a94-007-3957-5 320 $aIncludes bibliographical references and index. 327 $aIntroduction -- Literature Survey -- Motivational Example: MPEG-2 Encoder Design -- Target NoC Platform -- NoCPerformance Analysis -- Application-specific NoC Architecture Custimization using Long-range Links -- Analysis and Optimization of Prediction-based Flow Control in Networks-on-Chip -- Design and Management of VFI Partition Networks-on-Chip -- Conclusion -- Bibliography -- Appendix A. Tools and FPGA prototype -- Appendix B. Experiments using the Single-chip Cloud Computer (SCC) Platform. 330 $aTraditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance and energy consumption of the overall system. As a result, a shift from computation-based to communication-based design becomes mandatory. Towards this end, network-on-chip (NoC) communication architectures have emerged recently as a promising alternative to classical bus and point-to-point communication architectures. This book explores outstanding research problems related to modeling, analysis and optimization of NoC communication architectures. More precisely, we present novel design methodologies, software tools and FPGA prototypes to aid the design of application-specific NoCs. 410 0$aLecture notes in electrical engineering ;$v184. 606 $aNetworks on a chip 606 $aRouters (Computer networks) 606 $aComputer architecture$xMathematical models 615 0$aNetworks on a chip. 615 0$aRouters (Computer networks) 615 0$aComputer architecture$xMathematical models. 676 $a621.381531 700 $aOgras$b Umit Y$01064673 701 $aMarculescu$b Radu$0946527 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910438038403321 996 $aModeling, analysis and optimization of network-on-chip communication architectures$94200663 997 $aUNINA