LEADER 03374nam 2200637 a 450 001 9910437893303321 005 20200520144314.0 010 $a3-642-34543-3 010 $a1-283-94633-5 024 7 $a10.1007/978-3-642-34543-2 035 $a(CKB)2670000000533362 035 $a(EBL)1082820 035 $a(OCoLC)823728273 035 $a(SSID)ssj0000810762 035 $a(PQKBManifestationID)11498422 035 $a(PQKBTitleCode)TC0000810762 035 $a(PQKBWorkID)10833454 035 $a(PQKB)10083750 035 $a(DE-He213)978-3-642-34543-2 035 $a(MiAaPQ)EBC1082820 035 $a(PPN)168327120 035 $a(EXLCZ)992670000000533362 100 $a20130109d2013 uy 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aDelta-sigma A/D-converters $epractical design for communication systems /$fRichard Gaggl 205 $a1st ed. 2013. 210 $aBerlin $cSpringer$d2013 215 $a1 online resource (156 p.) 225 1 $aSpringer Series in Advanced Microelectronics,$x1437-0387 300 $aDescription based upon print version of record. 311 $a3-642-34542-5 311 $a3-642-43599-8 320 $aIncludes bibliographical references and index. 327 $aLimitations of Delta-Sigma Converters -- A Delta-Sigma Converter with Dynamic-Biasing Technique -- A feed-forward Delta-Sigma Converter for ADSL -- A Delta-Sigma Converter for WLAN using a TEQ. 330 $aThe emphasis of this book is on practical design aspects for broadband A/D converters for communication systems. The embedded designs are employed for transceivers in the field of ADSL solutions and WLAN applications. An area- and power-efficient realization of a converter is mandatory to remain competitive in the market. The right choice for the converter topology and architecture needs to be done very carefully to result in a competitive FOM. The book begins with a brief overview of basic concepts about ADSL and WLAN to understand the ADC requirements. At architectural level, issues on different modulator topologies are discussed employing the provided technology node. The design issues are pointed out in detail for modern digital CMOS technologies, beginning with 180nm followed by 130nm and going down to 65nm feature size. Beside practical aspects, challenges to mixed-signal design level are addressed to optimize the converters in terms of consumed chip area, power consumption and design for high yield in volume production. Thus, careful considerations on circuit- and architectural- level are performed by introducing a dynamic-biasing technique, a feed-forward approach and a resolution in time instead of amplitude resolution. 410 0$aSpringer Series in Advanced Microelectronics,$x1437-0387 606 $aAnalog-to-digital converters 606 $aDigital-to-analog converters 606 $aModulators (Electronics)$xDesign 615 0$aAnalog-to-digital converters. 615 0$aDigital-to-analog converters. 615 0$aModulators (Electronics)$xDesign. 676 $a004.01/51 676 $a621.381/32 700 $aGaggl$b Richard$01058908 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910437893303321 996 $aDelta-Sigma A$92503124 997 $aUNINA