LEADER 04262nam 22006735 450 001 9910366610703321 005 20200702064043.0 010 $a3-030-35743-0 024 7 $a10.1007/978-3-030-35743-6 035 $a(CKB)5280000000190096 035 $a(MiAaPQ)EBC5995823 035 $a(DE-He213)978-3-030-35743-6 035 $a(PPN)24281932X 035 $a(EXLCZ)995280000000190096 100 $a20191211d2020 u| 0 101 0 $aeng 135 $aurcnu|||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aUsing Artificial Neural Networks for Analog Integrated Circuit Design Automation /$fby João P. S. Rosa, Daniel J. D. Guerra, Nuno C. G. Horta, Ricardo M. F. Martins, Nuno C. C. Lourenço 205 $a1st ed. 2020. 210 1$aCham :$cSpringer International Publishing :$cImprint: Springer,$d2020. 215 $a1 online resource (117 pages) 225 1 $aSpringerBriefs in Applied Sciences and Technology,$x2191-530X 311 $a3-030-35742-2 327 $aIntroduction -- Related Work -- Overview of Artificial Neural Networks (ANNs) -- On the Exploration of Promising Analog IC Designs via ANNs -- ANNs as an Alternative for Automatic Analog IC Placement -- Conclusions. . 330 $aThis book addresses the automatic sizing and layout of analog integrated circuits (ICs) using deep learning (DL) and artificial neural networks (ANN). It explores an innovative approach to automatic circuit sizing where ANNs learn patterns from previously optimized design solutions. In opposition to classical optimization-based sizing strategies, where computational intelligence techniques are used to iterate over the map from devices? sizes to circuits? performances provided by design equations or circuit simulations, ANNs are shown to be capable of solving analog IC sizing as a direct map from specifications to the devices? sizes. Two separate ANN architectures are proposed: a Regression-only model and a Classification and Regression model. The goal of the Regression-only model is to learn design patterns from the studied circuits, using circuit?s performances as input features and devices? sizes as target outputs. This model can size a circuit given its specifications for a single topology. The Classification and Regression model has the same capabilities of the previous model, but it can also select the most appropriate circuit topology and its respective sizing given the target specification. The proposed methodology was implemented and tested on two analog circuit topologies. . 410 0$aSpringerBriefs in Applied Sciences and Technology,$x2191-530X 606 $aElectronic circuits 606 $aSignal processing 606 $aImage processing 606 $aSpeech processing systems 606 $aComputational intelligence 606 $aCircuits and Systems$3https://scigraph.springernature.com/ontologies/product-market-codes/T24068 606 $aSignal, Image and Speech Processing$3https://scigraph.springernature.com/ontologies/product-market-codes/T24051 606 $aComputational Intelligence$3https://scigraph.springernature.com/ontologies/product-market-codes/T11014 615 0$aElectronic circuits. 615 0$aSignal processing. 615 0$aImage processing. 615 0$aSpeech processing systems. 615 0$aComputational intelligence. 615 14$aCircuits and Systems. 615 24$aSignal, Image and Speech Processing. 615 24$aComputational Intelligence. 676 $a621.3815 676 $a621.3815 700 $aRosa$b João P. S$4aut$4http://id.loc.gov/vocabulary/relators/aut$01061375 702 $aGuerra$b Daniel J. D$4aut$4http://id.loc.gov/vocabulary/relators/aut 702 $aHorta$b Nuno C. G$4aut$4http://id.loc.gov/vocabulary/relators/aut 702 $aMartins$b Ricardo M. F$4aut$4http://id.loc.gov/vocabulary/relators/aut 702 $aLourenço$b Nuno C. C$4aut$4http://id.loc.gov/vocabulary/relators/aut 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910366610703321 996 $aUsing Artificial Neural Networks for Analog Integrated Circuit Design Automation$92518625 997 $aUNINA