LEADER 03661nam 22005775 450 001 9910366578803321 005 20200705234232.0 010 $a3-030-30596-1 024 7 $a10.1007/978-3-030-30596-3 035 $a(CKB)4100000009938037 035 $a(MiAaPQ)EBC5983884 035 $a(DE-He213)978-3-030-30596-3 035 $a(EXLCZ)994100000009938037 100 $a20191122d2020 u| 0 101 0 $aeng 135 $aurcnu|||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aSystem-on-Chip Security $eValidation and Verification /$fby Farimah Farahmandi, Yuanwen Huang, Prabhat Mishra 205 $a1st ed. 2020. 210 1$aCham :$cSpringer International Publishing :$cImprint: Springer,$d2020. 215 $a1 online resource (295 pages) 311 $a3-030-30595-3 327 $aIntroduction -- Security Verification Using Formal Methods -- Simulation-Based Security Validation Approaches -- Security Validation Using Side-Channel Analysis -- Automated Vulnerability Detection And Mitigation -- Conclusion. 330 $aThis book describes a wide variety of System-on-Chip (SoC) security threats and vulnerabilities, as well as their sources, in each stage of a design life cycle. The authors discuss a wide variety of state-of-the-art security verification and validation approaches such as formal methods and side-channel analysis, as well as simulation-based security and trust validation approaches. This book provides a comprehensive reference for system on chip designers and verification and validation engineers interested in verifying security and trust of heterogeneous SoCs. Outlines a wide variety of hardware security threats and vulnerabilities as well as their sources in each of the stages of a design life cycle; Summarizes unsafe current design practices that lead to security and trust vulnerabilities; Covers state-of-the-art techniques as well as ongoing research efforts in developing scalable security validation using formal methods including symbolic algebra, model checkers, SAT solvers, and theorem provers; Explains how to leverage security validation approaches to prevent side-channel attacks; Presents automated debugging and patching techniques in the presence of security vulnerabilities; Includes case studies for security validation of arithmetic circuits, controller designs, as well as processor-based SoCs. 606 $aElectronic circuits 606 $aMicroprocessors 606 $aElectronics 606 $aMicroelectronics 606 $aCircuits and Systems$3https://scigraph.springernature.com/ontologies/product-market-codes/T24068 606 $aProcessor Architectures$3https://scigraph.springernature.com/ontologies/product-market-codes/I13014 606 $aElectronics and Microelectronics, Instrumentation$3https://scigraph.springernature.com/ontologies/product-market-codes/T24027 615 0$aElectronic circuits. 615 0$aMicroprocessors. 615 0$aElectronics. 615 0$aMicroelectronics. 615 14$aCircuits and Systems. 615 24$aProcessor Architectures. 615 24$aElectronics and Microelectronics, Instrumentation. 676 $a621.3815 700 $aFarahmandi$b Farimah$4aut$4http://id.loc.gov/vocabulary/relators/aut$0977878 702 $aHuang$b Yuanwen$4aut$4http://id.loc.gov/vocabulary/relators/aut 702 $aMishra$b Prabhat$4aut$4http://id.loc.gov/vocabulary/relators/aut 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910366578803321 996 $aSystem-on-Chip Security$92227739 997 $aUNINA