LEADER 03676nam 22005895 450 001 9910350221703321 005 20200706042247.0 010 $a981-15-0046-0 024 7 $a10.1007/978-981-15-0046-6 035 $a(CKB)4100000009451877 035 $a(DE-He213)978-981-15-0046-6 035 $a(MiAaPQ)EBC5899816 035 $a(PPN)258304715 035 $a(EXLCZ)994100000009451877 100 $a20190920d2019 u| 0 101 0 $aeng 135 $aurnn|008mamaa 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aInvestigation on SiGe Selective Epitaxy for Source and Drain Engineering in 22 nm CMOS Technology Node and Beyond /$fby Guilei Wang 205 $a1st ed. 2019. 210 1$aSingapore :$cSpringer Singapore :$cImprint: Springer,$d2019. 215 $a1 online resource (XVI, 115 p.) 225 1 $aSpringer Theses, Recognizing Outstanding Ph.D. Research,$x2190-5053 300 $a"Doctoral thesis accepted by Chinese Academy of Sciences, Beijing, China"--Title page. 311 $a981-15-0045-2 320 $aIncludes bibliographical references. 327 $aIntroduction -- Strain technology of Si-based materials -- SiGe Epitaxial Growth and material characterization -- SiGe Source and Drain Integration and transistor performance investigation -- Pattern Dependency behavior of SiGe Selective Epitaxy -- Summary and final words. 330 $aThis thesis presents the SiGe source and drain (S/D) technology in the context of advanced CMOS, and addresses both device processing and epitaxy modelling. As the CMOS technology roadmap calls for continuously downscaling traditional transistor structures, controlling the parasitic effects of transistors, e.g. short channel effect, parasitic resistances and capacitances is becoming increasingly difficult. The emergence of these problems sparked a technological revolution, where a transition from planar to three-dimensional (3D) transistor design occurred in the 22nm technology node. The selective epitaxial growth (SEG) method has been used to deposit SiGe as stressor material in S/D regions to induce uniaxial strain in the channel region. The thesis investigates issues of process integration in IC production and concentrates on the key parameters of high-quality SiGe selective epitaxial growth, with a special focus on its pattern dependency behavior and on key integration issues in both 2D and 3D transistor structures, the goal being to improve future applications of SiGe SEG in advanced CMOS. 410 0$aSpringer Theses, Recognizing Outstanding Ph.D. Research,$x2190-5053 606 $aSemiconductors 606 $aElectronic circuits 606 $aNanotechnology 606 $aSemiconductors$3https://scigraph.springernature.com/ontologies/product-market-codes/P25150 606 $aCircuits and Systems$3https://scigraph.springernature.com/ontologies/product-market-codes/T24068 606 $aNanotechnology and Microengineering$3https://scigraph.springernature.com/ontologies/product-market-codes/T18000 615 0$aSemiconductors. 615 0$aElectronic circuits. 615 0$aNanotechnology. 615 14$aSemiconductors. 615 24$aCircuits and Systems. 615 24$aNanotechnology and Microengineering. 676 $a537.622 700 $aWang$b Guilei$4aut$4http://id.loc.gov/vocabulary/relators/aut$0838756 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910350221703321 996 $aInvestigation on SiGe Selective Epitaxy for Source and Drain Engineering in 22 nm CMOS Technology Node and Beyond$91873375 997 $aUNINA