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200 10$aIEC/IEEE international standard - behavioural languages$hPart 5$iStandard VITAL ASIC (application specific integrated circuit) modeling specification /$fInstitute of Electrical and Electronics Engineers
210  1$aNew York, New York :$cIEEE,$d2004.
215   $a1 online resource
330   $aIThe VITAL (VHDL Initiative Towards ASIC Libraries) ASIC Modeling Specification is defined in this standard. This modeling specification defines a methodology which promotes the development of highly accurate, efficient simulation models for ASIC (Application-Specific Integrated Circuit) components in VHDL.
517   $a61691-5-2004 - IEC/IEEE International Standard - Behavioral Languages - Part 5
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