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200 10$a62142-2005 - IEC/IEEE iInternational standard - Verilog(R) Register Transfer Level synthesis /$fInstitute of Electrical and Electronics Engineers
210  1$aNew York, New York :$cIEEE,$d2002.
215   $a1 online resource (116 pages)
330   $aReplaces IEEE Std 1364.1-2002. To develop a standard syntax and semantics for Verilog RTL synthesis. This standard shall define the subset of IEEE 1364 (Verilog HDL) which is suitable for RTL synthesis and shall define the semantics of that subset for the synthesis domain. This standard shall be based on the current existing standard IEEE 1364.
517   $a62142-2005 - IEC/IEEE International Standard - Verilog
606   $aVHDL (Computer hardware description language)
615  0$aVHDL (Computer hardware description language)
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