LEADER 04755nam 2201213z- 450 001 9910346680003321 005 20231214133308.0 010 $a3-03921-011-4 035 $a(CKB)4920000000094867 035 $a(oapen)https://directory.doabooks.org/handle/20.500.12854/53550 035 $a(EXLCZ)994920000000094867 100 $a20202102d2019 |y 0 101 0 $aeng 135 $aurmn|---annan 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aMiniaturized Transistors 210 $cMDPI - Multidisciplinary Digital Publishing Institute$d2019 215 $a1 electronic resource (202 p.) 311 $a3-03921-010-6 330 $aWhat is the future of CMOS? Sustaining increased transistor densities along the path of Moore's Law has become increasingly challenging with limited power budgets, interconnect bandwidths, and fabrication capabilities. In the last decade alone, transistors have undergone significant design makeovers; from planar transistors of ten years ago, technological advancements have accelerated to today's FinFETs, which hardly resemble their bulky ancestors. FinFETs could potentially take us to the 5-nm node, but what comes after it? From gate-all-around devices to single electron transistors and two-dimensional semiconductors, a torrent of research is being carried out in order to design the next transistor generation, engineer the optimal materials, improve the fabrication technology, and properly model future devices. We invite insight from investigators and scientists in the field to showcase their work in this Special Issue with research papers, short communications, and review articles that focus on trends in micro- and nanotechnology from fundamental research to applications. 610 $aMOSFET 610 $atotal ionizing dose (TID) 610 $alow power consumption 610 $aprocess simulation 610 $atwo-dimensional material 610 $anegative-capacitance 610 $apower consumption 610 $atechnology computer aided design (TCAD) 610 $athin-film transistors (TFTs) 610 $aband-to-band tunneling (BTBT) 610 $ananowires 610 $ainversion channel 610 $ametal oxide semiconductor field effect transistor (MOSFET) 610 $aspike-timing-dependent plasticity (STDP) 610 $afield effect transistor 610 $asegregation 610 $asystematic variations 610 $aSentaurus TCAD 610 $aindium selenide 610 $ananosheets 610 $atechnology computer-aided design (TCAD) 610 $ahigh-? dielectric 610 $asubthreshold bias range 610 $astatistical variations 610 $afin field effect transistor (FinFET) 610 $acompact models 610 $anon-equilibrium Green's function 610 $aetching simulation 610 $ahighly miniaturized transistor structure 610 $acompact model 610 $asilicon nanowire 610 $asurface potential 610 $aSilicon-Germanium source/drain (SiGe S/D) 610 $ananowire 610 $aplasma-aided molecular beam epitaxy (MBE) 610 $aphonon scattering 610 $amobility 610 $asilicon-on-insulator 610 $adrain engineered 610 $adevice simulation 610 $avariability 610 $asemi-floating gate 610 $asynaptic transistor 610 $aneuromorphic system 610 $atheoretical model 610 $aCMOS 610 $aferroelectrics 610 $atunnel field-effect transistor (TFET) 610 $aSiGe 610 $ametal gate granularity 610 $aburied channel 610 $aON-state 610 $abulk NMOS devices 610 $aambipolar 610 $apiezoelectrics 610 $atunnel field effect transistor (TFET) 610 $aFinFETs 610 $apolarization 610 $afield-effect transistor 610 $aline edge roughness 610 $arandom discrete dopants 610 $aradiation hardened by design (RHBD) 610 $alow energy 610 $aflux calculation 610 $adoping incorporation 610 $alow voltage 610 $atopography simulation 610 $aMOS devices 610 $alow-frequency noise 610 $ahigh-k 610 $alayout 610 $alevel set 610 $aprocess variations 610 $asubthreshold 610 $ametal gate stack 610 $aelectrostatic discharge (ESD) 700 $aGrasser$b Tibor$4auth$01317897 702 $aFilipovic$b Lado$4auth 906 $aBOOK 912 $a9910346680003321 996 $aMiniaturized Transistors$93033066 997 $aUNINA