LEADER 03751nam 22005775 450 001 9910337640503321 005 20200630165055.0 010 $a3-030-10958-5 024 7 $a10.1007/978-3-030-10958-5 035 $a(CKB)4100000007598315 035 $a(MiAaPQ)EBC5660317 035 $a(DE-He213)978-3-030-10958-5 035 $a(PPN)233798927 035 $a(EXLCZ)994100000007598315 100 $a20190130d2019 u| 0 101 0 $aeng 135 $aurcnu|||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aDigital Subsampling Phase Lock Techniques for Frequency Synthesis and Polar Transmission /$fby Nereo Markulic, Kuba Raczkowski, Jan Craninckx, Piet Wambacq 205 $a1st ed. 2019. 210 1$aCham :$cSpringer International Publishing :$cImprint: Springer,$d2019. 215 $a1 online resource (156 pages) 225 1 $aAnalog Circuits and Signal Processing,$x1872-082X 311 $a3-030-10957-7 327 $aChapter 1. Introduction -- Chapter 2. A Digital-to-Time Converter based Subsampling PLL for Fractional Synthesis -- Chapter 3. A Background-Calibrated Subsampling PLL for Phase/Frequency Modulation -- Chapter 4. A Background-Calibrated Digital Subsampling Polar Transmitter -- Chapter 5. Conclusion and Future Outlook. 330 $aThis book explains concepts behind fractional subsampling-based frequency synthesis that is re-shaping today?s art in the field of low-noise LO generation. It covers advanced material, giving clear guidance for development of background-calibrated environments capable of spur-free synthesis and wideband phase modulation. It further expands the concepts into the field of subsampling polar transmission, where the newly developed architecture enables unprecedented spectral efficiency levels, unquestionably required by the upcoming generation of wireless standards. Guides development of DTC-based Fractional-N Subsampling PLL and Subsampling Polar Transmitters, covering material from fundamental theory, over system level considerations to building block IC implementation; Describes a fully background-calibrated environment that can used in general context of fractional frequency synthesis and/or phase/frequency modulation; Presents three IC implementations, showing system level analysis, design methodology, circuit details and measurement results. 410 0$aAnalog Circuits and Signal Processing,$x1872-082X 606 $aElectronic circuits 606 $aElectronics 606 $aMicroelectronics 606 $aCircuits and Systems$3https://scigraph.springernature.com/ontologies/product-market-codes/T24068 606 $aElectronic Circuits and Devices$3https://scigraph.springernature.com/ontologies/product-market-codes/P31010 606 $aElectronics and Microelectronics, Instrumentation$3https://scigraph.springernature.com/ontologies/product-market-codes/T24027 615 0$aElectronic circuits. 615 0$aElectronics. 615 0$aMicroelectronics. 615 14$aCircuits and Systems. 615 24$aElectronic Circuits and Devices. 615 24$aElectronics and Microelectronics, Instrumentation. 676 $a621.3815364 676 $a621.3815364 700 $aMarkulic$b Nereo$4aut$4http://id.loc.gov/vocabulary/relators/aut$0867190 702 $aRaczkowski$b Kuba$4aut$4http://id.loc.gov/vocabulary/relators/aut 702 $aCraninckx$b Jan$4aut$4http://id.loc.gov/vocabulary/relators/aut 702 $aWambacq$b Piet$4aut$4http://id.loc.gov/vocabulary/relators/aut 906 $aBOOK 912 $a9910337640503321 996 $aDigital Subsampling Phase Lock Techniques for Frequency Synthesis and Polar Transmission$91935529 997 $aUNINA