LEADER 03165nam  22005055  450 
001 9910337620903321
005 20250527121130.0
010   $a981-10-8776-8
024 7 $a10.1007/978-981-10-8776-9
035   $a(CKB)4100000007223462
035   $a(MiAaPQ)EBC5620499
035   $a(DE-He213)978-981-10-8776-9
035   $a(PPN)232961913
035   $a(EXLCZ)994100000007223462
100   $a20181215d2019      u|         0
101 0 $aeng
135   $aurcnu||||||||
181   $ctxt$2rdacontent
182   $cc$2rdamedia
183   $acr$2rdacarrier
200 10$aAdvanced HDL Synthesis and SOC Prototyping $eRTL Design Using Verilog /$fby Vaibbhav Taraate
205   $a1st ed. 2019.
210  1$aSingapore :$cSpringer Singapore :$cImprint: Springer,$d2019.
215   $a1 online resource (xxi, 307 pages)
311 08$a981-10-8775-X 
327   $aIntroduction -- SOC Design -- RTL Design Guidelines -- RTL Design and Verification -- Processor cores and Architecture design -- Buses and protocols in SOC designs -- DSP Algorithms and Video Processing -- ASIC and FPGA Synthesis -- Static Timing Analysis -- SOC Prototyping -- SOC Prototyping guidelines -- Design Integration and SOC synthesis -- Interconnect delays and Timing -- SOC Prototyping and debug techniques -- Testing at the board level.
330   $aThis book describes RTL design using Verilog, synthesis and timing closure for System On Chip (SOC) design blocks. It covers the complex RTL design scenarios and challenges for SOC designs and provides practical information on performance improvements in SOC, as well as Application Specific Integrated Circuit (ASIC) designs. Prototyping using modern high density Field Programmable Gate Arrays (FPGAs) is discussed in this book with the practical examples and case studies. The book discusses SOC design, performance improvement techniques, testing and system level verification, while also describing the modern Intel FPGA/XILINX FPGA architectures and their use in SOC prototyping. Further, the book covers the Synopsys Design Compiler (DC) and Prime Time (PT) commands, and how they can be used to optimize complex ASIC/SOC designs. The contents of this book will be useful to students and professionals alike.
606   $aElectronic circuits
606   $aMicroprogramming
606   $aLogic design
606   $aCircuits and Systems$3https://scigraph.springernature.com/ontologies/product-market-codes/T24068
606   $aControl Structures and Microprogramming$3https://scigraph.springernature.com/ontologies/product-market-codes/I12018
606   $aLogic Design$3https://scigraph.springernature.com/ontologies/product-market-codes/I12050
615  0$aElectronic circuits.
615  0$aMicroprogramming.
615  0$aLogic design.
615 14$aCircuits and Systems.
615 24$aControl Structures and Microprogramming.
615 24$aLogic Design.
676   $a621.3815
700   $aTaraate$b Vaibbhav$4aut$4http://id.loc.gov/vocabulary/relators/aut$0788080
906   $aBOOK
912   $a9910337620903321
996   $aAdvanced HDL Synthesis and SOC Prototyping$92294597
997   $aUNINA