LEADER 03498nam  22005415  450 
001 9910299942803321
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010   $a981-10-1387-X
024 7 $a10.1007/978-981-10-1387-4
035   $a(CKB)4100000002892582
035   $a(MiAaPQ)EBC5334733
035   $a(DE-He213)978-981-10-1387-4
035   $a(PPN)225548917
035   $a(EXLCZ)994100000002892582
100   $a20180329d2018      u|         0
101 0 $aeng
135   $aurcnu||||||||
181   $ctxt$2rdacontent
182   $cc$2rdamedia
183   $acr$2rdacarrier
200 10$aFault Tolerant Architectures for Cryptography and Hardware Security /$fedited by SIKHAR PATRANABIS, Debdeep Mukhopadhyay
205   $a1st ed. 2018.
210  1$aSingapore :$cSpringer Singapore :$cImprint: Springer,$d2018.
215   $a1 online resource (242 pages)
225 1 $aComputer Architecture and Design Methodologies,$x2367-3478
311   $a981-10-1386-1 
327   $aIntroduction to Fault Analysis -- Classical Fault Analysis -- Recent Trends and Advances in Fault Analysis -- Automation of Fault Analysis -- Countermeasures and Fault Tolerant Architectures -- Practical Perspectives of Fault Tolerant Design.
330   $aThis book uses motivating examples and real-life attack scenarios to introduce readers to the general concept of fault attacks in cryptography. It offers insights into how the fault tolerance theories developed in the book can actually be implemented, with a particular focus on a wide spectrum of fault models and practical fault injection techniques, ranging from simple, low-cost techniques to high-end equipment-based methods. It then individually examines fault attack vulnerabilities in symmetric, asymmetric and authenticated encryption systems. This is followed by extensive coverage of countermeasure techniques and fault tolerant architectures that attempt to thwart such vulnerabilities. Lastly, it presents a case study of a comprehensive FPGA-based fault tolerant architecture for AES-128, which brings together of a number of the fault tolerance techniques presented. It concludes with a discussion on how fault tolerance can be combined with side channel security to achieve protection against implementation-based attacks. The text is supported by illustrative diagrams, algorithms, tables and diagrams presenting real-world experimental results.
410  0$aComputer Architecture and Design Methodologies,$x2367-3478
606   $aElectronic circuits
606   $aData encryption (Computer science)
606   $aSystem safety
606   $aCircuits and Systems$3https://scigraph.springernature.com/ontologies/product-market-codes/T24068
606   $aCryptology$3https://scigraph.springernature.com/ontologies/product-market-codes/I28020
606   $aSecurity Science and Technology$3https://scigraph.springernature.com/ontologies/product-market-codes/P31080
615  0$aElectronic circuits.
615  0$aData encryption (Computer science).
615  0$aSystem safety.
615 14$aCircuits and Systems.
615 24$aCryptology.
615 24$aSecurity Science and Technology.
676   $a004.2
702   $aPATRANABIS$b SIKHAR$4edt$4http://id.loc.gov/vocabulary/relators/edt
702   $aMukhopadhyay$b Debdeep$4edt$4http://id.loc.gov/vocabulary/relators/edt
906   $aBOOK
912   $a9910299942803321
996   $aFault Tolerant Architectures for Cryptography and Hardware Security$92526435
997   $aUNINA