LEADER 05005nam 22007095 450 001 9910299915903321 005 20200630003125.0 010 $a3-319-54422-5 024 7 $a10.1007/978-3-319-54422-9 035 $a(CKB)3710000001630948 035 $a(DE-He213)978-3-319-54422-9 035 $a(MiAaPQ)EBC4987803 035 $a(PPN)203852982 035 $a(EXLCZ)993710000001630948 100 $a20170829d2018 u| 0 101 0 $aeng 135 $aurnn|008mamaa 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aDependable Multicore Architectures at Nanoscale /$fedited by Marco Ottavi, Dimitris Gizopoulos, Salvatore Pontarelli 205 $a1st ed. 2018. 210 1$aCham :$cSpringer International Publishing :$cImprint: Springer,$d2018. 215 $a1 online resource (XXII, 281 p. 101 illus., 65 illus. in color.) 311 $a3-319-54421-7 320 $aIncludes bibliographical references at the end of each chapters. 327 $aIntroduction -- Part I: Current Challenges -- Manufacturing Challenges -- Dependability Challenges -- An Application Scenario -- Part II: Solutions -- Manufacturability Solutions -- Dependability Solutions -- Application-Specific Solutions -- Part III: Roadmap -- Technological Road Map -- Architectural Roadmap. 330 $aThis book provides comprehensive coverage of the dependability challenges in today's advanced computing systems. It is an in-depth discussion of all the technological and design-level techniques that may be used to overcome these issues and analyzes various dependability-assessment methods. The impact of individual application scenarios on the definition of challenges and solutions is considered so that the designer can clearly assess the problems and adjust the solution based on the specifications in question. The book is composed of three sections, beginning with an introduction to current dependability challenges arising in complex computing systems implemented with nanoscale technologies, and of the effect of the application scenario. The second section details all the fault-tolerance techniques that are applicable in the manufacture of reliable advanced computing devices. Different levels, from technology-level fault avoidance to the use of error correcting codes and system-level checkpointing are introduced and explained as applicable to the different application scenario requirements. Finally the third section proposes a roadmap of future trends in and perspectives on the dependability and manufacturability of advanced computing systems from the special point of view of industrial stakeholders. Dependable Multicore Architectures at Nanoscale showcases the original ideas and concepts introduced into the field of nanoscale manufacturing and systems reliability over nearly four years of work within COST Action IC1103 MEDIAN, a think-tank with participants from 27 countries. Academic researchers and graduate students working in multi-core computer systems and their manufacture will find this book of interest as will industrial design and manufacturing engineers working in VLSI companies. 606 $aElectronic circuits 606 $aComputer software?Reusability 606 $aQuality control 606 $aReliability 606 $aIndustrial safety 606 $aElectronics 606 $aMicroelectronics 606 $aMicroprocessors 606 $aCircuits and Systems$3https://scigraph.springernature.com/ontologies/product-market-codes/T24068 606 $aPerformance and Reliability$3https://scigraph.springernature.com/ontologies/product-market-codes/I12077 606 $aQuality Control, Reliability, Safety and Risk$3https://scigraph.springernature.com/ontologies/product-market-codes/T22032 606 $aElectronics and Microelectronics, Instrumentation$3https://scigraph.springernature.com/ontologies/product-market-codes/T24027 606 $aProcessor Architectures$3https://scigraph.springernature.com/ontologies/product-market-codes/I13014 615 0$aElectronic circuits. 615 0$aComputer software?Reusability. 615 0$aQuality control. 615 0$aReliability. 615 0$aIndustrial safety. 615 0$aElectronics. 615 0$aMicroelectronics. 615 0$aMicroprocessors. 615 14$aCircuits and Systems. 615 24$aPerformance and Reliability. 615 24$aQuality Control, Reliability, Safety and Risk. 615 24$aElectronics and Microelectronics, Instrumentation. 615 24$aProcessor Architectures. 676 $a621.3815 702 $aOttavi$b Marco$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aGizopoulos$b Dimitris$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aPontarelli$b Salvatore$4edt$4http://id.loc.gov/vocabulary/relators/edt 906 $aBOOK 912 $a9910299915903321 996 $aDependable Multicore Architectures at Nanoscale$92501144 997 $aUNINA