LEADER 03975nam 22005895 450 001 9910299905403321 005 20250609111805.0 010 $a981-10-8554-4 024 7 $a10.1007/978-981-10-8554-3 035 $a(CKB)4100000002892699 035 $a(MiAaPQ)EBC5434498 035 $a(DE-He213)978-981-10-8554-3 035 $a(PPN)225548925 035 $a(MiAaPQ)EBC5596265 035 $a(EXLCZ)994100000002892699 100 $a20180322d2018 u| 0 101 0 $aeng 135 $aurcnu|||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aEnergy Efficient High Performance Processors $eRecent Approaches for Designing Green High Performance Computing /$fby Jawad Haj-Yahya, Avi Mendelson, Yosi Ben Asher, Anupam Chattopadhyay 205 $a1st ed. 2018. 210 1$aSingapore :$cSpringer Nature Singapore :$cImprint: Springer,$d2018. 215 $a1 online resource (xiv, 165 pages) $cillustrations 225 1 $aComputer Architecture and Design Methodologies,$x2367-3486 311 08$a981-10-8553-6 327 $aIntroduction -- Background -- DOEE: Dynamic Optimization framework for better Energy Efficiency -- Fine-grain Power Breakdown of Modern Out-Of-Order Cores and its implications on Skylake based systems -- Compiler-Directed Power Management for Superscalars -- SEEM: Symbolic Execution for Energy Modeling -- Related Works -- Conclusions and Future Work. 330 $aThis book explores energy efficiency techniques for high-performance computing (HPC) systems using power-management methods. Adopting a step-by-step approach, it describes power-management flows, algorithms and mechanism that are employed in modern processors such as Intel Sandy Bridge, Haswell, Skylake and other architectures (e.g. ARM). Further, it includes practical examples and recent studies demonstrating how modem processors dynamically manage wide power ranges, from a few milliwatts in the lowest idle power state, to tens of watts in turbo state. Moreover, the book explains how thermal and power deliveries are managed in the context this huge power range. The book also discusses the different metrics for energy efficiency, presents several methods and applications of the power and energy estimation, and shows how by using innovative power estimation methods and new algorithms modern processors are able to optimize metrics such as power, energy, and performance. Different power estimation tools are presented, including tools that break down the power consumption of modern processors at sub-processor core/thread granularity. The book also investigates software, firmware and hardware coordination methods of reducing power consumption, for example a compiler-assisted power management method to overcome power excursions. Lastly, it examines firmware algorithms for dynamic cache resizing and dynamic voltage and frequency scaling (DVFS) for memory sub-systems. 410 0$aComputer Architecture and Design Methodologies,$x2367-3486 606 $aElectronic circuits 606 $aMicroprocessors 606 $aComputer architecture 606 $aElectronic Circuits and Systems 606 $aProcessor Architectures 615 0$aElectronic circuits. 615 0$aMicroprocessors. 615 0$aComputer architecture. 615 14$aElectronic Circuits and Systems. 615 24$aProcessor Architectures. 676 $a004.35 700 $aHaj-Yahya$b Jawad$4aut$4http://id.loc.gov/vocabulary/relators/aut$01061208 702 $aMendelson$b Avi$4aut$4http://id.loc.gov/vocabulary/relators/aut 702 $aBen Asher$b Yosi$4aut$4http://id.loc.gov/vocabulary/relators/aut 702 $aChattopadhyay$b Anupam$4aut$4http://id.loc.gov/vocabulary/relators/aut 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910299905403321 996 $aEnergy Efficient High Performance Processors$92517877 997 $aUNINA