LEADER 04526nam 22007575 450 001 9910299855103321 005 20200701050021.0 010 $a1-4939-1556-8 024 7 $a10.1007/978-1-4939-1556-9 035 $a(CKB)3710000000238296 035 $a(EBL)1965073 035 $a(OCoLC)890794300 035 $a(SSID)ssj0001354020 035 $a(PQKBManifestationID)11747060 035 $a(PQKBTitleCode)TC0001354020 035 $a(PQKBWorkID)11316954 035 $a(PQKB)11407149 035 $a(DE-He213)978-1-4939-1556-9 035 $a(MiAaPQ)EBC1965073 035 $a(PPN)181348225 035 $a(EXLCZ)993710000000238296 100 $a20140910d2015 u| 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aWafer-Level Chip-Scale Packaging $eAnalog and Power Semiconductor Applications /$fby Shichun Qu, Yong Liu 205 $a1st ed. 2015. 210 1$aNew York, NY :$cSpringer New York :$cImprint: Springer,$d2015. 215 $a1 online resource (336 p.) 300 $aDescription based upon print version of record. 311 $a1-4939-1555-X 320 $aIncludes bibliographical references and index. 327 $aChapter 1. Demand and Challenges for Wafer Level Analog and Power Packaging -- Chapter 2. Fan-In Analog Wafer Level Chip Scale Package -- Chapter 3. Fan-Out Analog Wafer Level Chip Scale Package -- Chapter 4. Wafer Level Analog Chip Scale Package Stackable Design -- Chapter 5. Wafer Level Discrete Power MOSFET Package Design -- Chapter 6. Wafer Level Packaging TSV/Stack die for Integration of Analog and Power Solution -- Chapter 7. Thermal Management, Design, Analysis for WLCSP -- Chapter 8. Electrical and Multi-Physics Simulations for Analog and Power WLCSP -- Chapter 9. WLCSP Typical Assembly Process -- Chapter 10. WLCSP Typical Reliability and Test. 330 $aThis book presents a state-of-art and in-depth overview in analog and power WLCSP design, material characterization, reliability, and modeling. Recent advances in analog and power electronic WLCSP packaging are presented based on the development of analog technology and power device integration. The book covers in detail how advances in semiconductor content, analog and power advanced WLCSP design, assembly, materials, and reliability have co-enabled significant advances in fan-in and fan-out with redistributed layer (RDL) of analog and power device capability during recent years. Along with new analog and power WLCSP development, the role of modeling is a key to assure successful package design. An overview of the analog and power WLCSP modeling and typical thermal, electrical, and stress modeling methodologies is also provided. This book also: ·         Covers the development of wafer-level power discrete packaging with regular wafer-level design concepts and directly bumping technology ·         Introduces the development of the analog and power SIP/3D/TSV/stack die packaging technology ·         Presents the wafer-level analog IC packaging design through fan-in and fan-out with RDLs. 606 $aElectronics 606 $aMicroelectronics 606 $aElectronic circuits 606 $aThermodynamics 606 $aHeat engineering 606 $aHeat transfer 606 $aMass transfer 606 $aElectronics and Microelectronics, Instrumentation$3https://scigraph.springernature.com/ontologies/product-market-codes/T24027 606 $aCircuits and Systems$3https://scigraph.springernature.com/ontologies/product-market-codes/T24068 606 $aEngineering Thermodynamics, Heat and Mass Transfer$3https://scigraph.springernature.com/ontologies/product-market-codes/T14000 615 0$aElectronics. 615 0$aMicroelectronics. 615 0$aElectronic circuits. 615 0$aThermodynamics. 615 0$aHeat engineering. 615 0$aHeat transfer. 615 0$aMass transfer. 615 14$aElectronics and Microelectronics, Instrumentation. 615 24$aCircuits and Systems. 615 24$aEngineering Thermodynamics, Heat and Mass Transfer. 676 $a620 676 $a621.381 676 $a621.3815 676 $a621.4021 700 $aQu$b Shichun$4aut$4http://id.loc.gov/vocabulary/relators/aut$0720835 702 $aLiu$b Yong$4aut$4http://id.loc.gov/vocabulary/relators/aut 906 $aBOOK 912 $a9910299855103321 996 $aWafer-Level Chip-Scale Packaging$92505960 997 $aUNINA