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010   $a3-319-08696-0
024 7 $a10.1007/978-3-319-08696-5
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035   $a(EBL)1968507
035   $a(OCoLC)899211494
035   $a(SSID)ssj0001424381
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035   $a(PQKBTitleCode)TC0001424381
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035   $a(DE-He213)978-3-319-08696-5
035   $a(MiAaPQ)EBC1968507
035   $a(PPN)183521374
035   $a(EXLCZ)993710000000329753
100   $a20150102d2015      u|         0
101 0 $aeng
135   $aur|n|---|||||
181   $ctxt
182   $cc
183   $acr
200 10$aMultiprocessor Scheduling for Real-Time Systems /$fby Sanjoy Baruah, Marko Bertogna, Giorgio Buttazzo
205   $a1st ed. 2015.
210  1$aCham :$cSpringer International Publishing :$cImprint: Springer,$d2015.
215   $a1 online resource (234 p.)
225 1 $aEmbedded Systems,$x2193-0155
300   $aDescription based upon print version of record.
311   $a3-319-08695-2 
320   $aIncludes bibliographical references and index.
327   $aIntroduction: background, scope, and context -- Preliminaries: workload and platform models -- Preliminaries: scheduling concepts and goals -- A review of selected results on uniprocessors -- Implicit-deadline (L&L) tasks -- Partitioned scheduling of L&L tasks -- Global dynamic-priority scheduling of L&L tasks -- Global Fixed-Job-Priority scheduling of L&L tasks -- Global Fixed-Task-Priority scheduling of L&L tasks.
330   $aThis book provides a comprehensive overview of both theoretical and pragmatic aspects of resource-allocation and scheduling in multiprocessor and multicore hard-real-time systems.  The authors derive new, abstract models of real-time tasks that capture accurately the salient features of real application systems that are to be implemented on multiprocessor platforms, and identify rules for mapping application systems onto the most appropriate models.  New run-time multiprocessor scheduling algorithms are presented, which are demonstrably better than those currently used, both in terms of run-time efficiency and tractability of off-line analysis.  Readers will benefit from a new design and analysis framework for multiprocessor real-time systems, which will translate into a significantly enhanced ability to provide formally verified, safety-critical real-time systems at a significantly lower cost.
410  0$aEmbedded Systems,$x2193-0155
606   $aElectronic circuits
606   $aMicroprocessors
606   $aElectronics
606   $aMicroelectronics
606   $aCircuits and Systems$3https://scigraph.springernature.com/ontologies/product-market-codes/T24068
606   $aProcessor Architectures$3https://scigraph.springernature.com/ontologies/product-market-codes/I13014
606   $aElectronics and Microelectronics, Instrumentation$3https://scigraph.springernature.com/ontologies/product-market-codes/T24027
615  0$aElectronic circuits.
615  0$aMicroprocessors.
615  0$aElectronics.
615  0$aMicroelectronics.
615 14$aCircuits and Systems.
615 24$aProcessor Architectures.
615 24$aElectronics and Microelectronics, Instrumentation.
676   $a658.05
700   $aBaruah$b Sanjoy$4aut$4http://id.loc.gov/vocabulary/relators/aut$0739760
702   $aBertogna$b Marko$4aut$4http://id.loc.gov/vocabulary/relators/aut
702   $aButtazzo$b Giorgio$4aut$4http://id.loc.gov/vocabulary/relators/aut
801  0$bMiAaPQ
801  1$bMiAaPQ
801  2$bMiAaPQ
906   $aBOOK
912   $a9910299843703321
996   $aMultiprocessor Scheduling for Real-Time Systems$92515639
997   $aUNINA