LEADER 04138nam 22007455 450 001 9910299759203321 005 20220222194030.0 010 $a3-642-45309-0 024 7 $a10.1007/978-3-642-45309-0 035 $a(CKB)3710000000119192 035 $a(DE-He213)978-3-642-45309-0 035 $a(SSID)ssj0001239408 035 $a(PQKBManifestationID)11951151 035 $a(PQKBTitleCode)TC0001239408 035 $a(PQKBWorkID)11186533 035 $a(PQKB)11787343 035 $a(MiAaPQ)EBC3101125 035 $a(Au-PeEL)EBL3101125 035 $a(CaPaEBR)ebr10976166 035 $a(OCoLC)879590681 035 $a(PPN)178784168 035 $a(MiAaPQ)EBC30766935 035 $a(Au-PeEL)EBL30766935 035 $a(EXLCZ)993710000000119192 100 $a20140509d2014 u| 0 101 0 $aeng 135 $aurnn#008mamaa 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aDigital Signal Processing with Field Programmable Gate Arrays /$fby Uwe Meyer-Baese 205 $a4th ed. 2014. 210 1$aBerlin, Heidelberg :$cSpringer Berlin Heidelberg :$cImprint: Springer,$d2014. 215 $a1 online resource (XXIII, 930 p. 459 illus., 11 illus. in color.) 225 1 $aSignals and Communication Technology,$x1860-4862 300 $aBibliographic Level Mode of Issuance: Monograph 311 $a3-642-45308-2 327 $aComputer Arithmetic -- Finite Impulse Response (FIR) Digital Filtres -- Infinite Impulse Response (IIR) Digital Filtres -- Multirate Signal Processing -- Fourier Transforms -- Advanced Topics -- Adaptive Filtres -- Microprocessor Design. 330 $aField-Programmable Gate Arrays (FPGAs) are revolutionizing digital signal processing. The efficient implementation of front-end digital signal processing algorithms is the main goal of this book. It starts with an overview of today's FPGA technology, devices, and tools for designing state-of-the-art DSP systems. A case study in the first chapter is the basis for more than 40 design examples throughout. The following chapters deal with computer arithmetic concepts, theory and the implementation of FIR and IIR filters, multirate digital signal processing systems, DFT and FFT algorithms, advanced algorithms with high future potential, and adaptive filters. Each chapter contains exercises. The VERILOG source code and a glossary are given in the appendices. This new edition incorporates Over 10 new system level case studies designed in VHDL and Verilog A new chapter on image and video processing An Altera Quartus update and new ModelSim simulations Xilinx Atlys board and ISIM simulation support Signed fixed point and floating point IEEE library examples An overview on parallel all-pass IIR filter design ICA and PCA system level designs ? Speech and audio coding for MP3 and ADPCM. 410 0$aSignals and Communication Technology,$x1860-4862 606 $aSignal processing 606 $aImage processing 606 $aSpeech processing systems 606 $aMicroprogramming  606 $aElectronic circuits 606 $aSignal, Image and Speech Processing$3https://scigraph.springernature.com/ontologies/product-market-codes/T24051 606 $aControl Structures and Microprogramming$3https://scigraph.springernature.com/ontologies/product-market-codes/I12018 606 $aCircuits and Systems$3https://scigraph.springernature.com/ontologies/product-market-codes/T24068 615 0$aSignal processing. 615 0$aImage processing. 615 0$aSpeech processing systems. 615 0$aMicroprogramming . 615 0$aElectronic circuits. 615 14$aSignal, Image and Speech Processing. 615 24$aControl Structures and Microprogramming. 615 24$aCircuits and Systems. 676 $a621.382 700 $aMeyer-Baese$b Uwe$4aut$4http://id.loc.gov/vocabulary/relators/aut$0556049 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910299759203321 996 $aDigital signal processing with field programmable gate arrays$91574408 997 $aUNINA